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74VHC157M

QUAD 2 CHANNEL MULTIPLEXER

STMicroelectronics 

®

74VHC157

QUAD 2 CHANNEL MULTIPLEXER

s HIGH SPEED: tPD = 4.1 ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA = 25 oC

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28% VCC (MIN.)

s POWER DOWN PROTECTION ON INPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 157

s IMPROVED LATCH-UP IMMUNITY

s LOW NOISE: VOLP = 0.8V (Max.)

DESCRIPTION

The 74VHC157 is an high-speed CMOS QUAD

2-CHANNEL MULTIPLEXER fabricated with

sub-micron silicon gate and double-layer metal

wiring C2MOS technology.

It consists of four 2-input digital multiplexers with

common select and strobe inputs. It is a

PRELIMINARY DATA

M1

(Micro Package)

T

(TSSOP Package)

ORDER CODES :

74VHC157M

74VHC157T

non-inverting multiplexer. When the STROBE

input is held high, selection of data is inhibited

and all the outputs become low. The SELECT

decoding determines whether the A or B inputs

get routed to their corresponding Y outputs.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.All inputs and outputs

are equipped with protection circuits against static

discharge, giving them 2KV ESD immunity and

transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

June 1999

1/9

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