74V2T08(2003) Просмотр технического описания (PDF) - STMicroelectronics

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74V2T08
(Rev.:2003)

DUAL 2-INPUT AND GATE

STMicroelectronics 

74V2T08

DUAL 2-INPUT AND GATE

s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 1µA(MAX.) at TA = 25°C

s COMPATIBLE WITH TTL OUTPUTS

VIH = 2V (MIN), VIL = 0.8V (MAX)

s POWER DOWN PROTECTION ON INPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8mA (MIN) at VCC = 4.5V

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 4.5V to 5.5V

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74V2T08 is an advanced high-speed CMOS

DUAL 2-INPUT AND GATE fabricated with

sub-micron silicon gate and double-layer metal

wiring C2MOS technology.

SOT23-8L

ORDER CODES

PACKAGE

SOT23-8L

T&R

74V2T08STR

The internal circuit is composed of 2 stages

including buffer output, which provide high noise

immunity and stable output.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage.

This device can be used to interface 5V to 3V.

PIN CONNECTION AND IEC LOGIC SYMBOLS

June 2003

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