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74V2G03(2003) Просмотр технического описания (PDF) - STMicroelectronics

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74V2G03
(Rev.:2003)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74V2G03 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
74V2G03
DUAL 2-INPUT OPEN DRAIN NAND GATE
s HIGH SPEED: tPD = 3.9ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA = 25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2G03 is an advanced high-speed CMOS
DUAL 2-INPUT OPEN DRAIN NAND GATE
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
The device can, with an external pull-up resistor,
be used in wired AND configuration. This device
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2G03STR
can also be used as a led driver in any other
application requiring current sink.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
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