74LVC3G34DC Просмотр технического описания (PDF) - Philips Electronics

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74LVC3G34DC

Triple buffer gate

Philips Electronics 

Philips Semiconductors

6. Functional diagram

74LVC3G34

Triple buffer gate

1 1A

1Y 7

2 3Y

3 2A

3A 6

2Y 5

001aaa684

Fig 1. Logic symbol

7. Pinning information

7.1 Pinning

1

1

7

3

1

5

6

1

2

001aaa724

Fig 2. IEC logic symbol

1A 1

3Y 2

2A 3

GND 4

3G34

8 VCC

7 1Y

6 3A

5 2Y

001aaa609

Fig 3. Pin configuration VSSOP8 and

TSSOP8

3G34

1A 1

8 VCC

3Y 2

7 1Y

2A 3

6 3A

GND 4

5 2Y

001aac024

Transparent top view

Fig 4. Pin configuration XSON8

7.2 Pin description

Table 4:

Symbol

1A

3Y

2A

GND

2Y

3A

1Y

VCC

Pin description

Pin

1

2

3

4

5

6

7

8

Description

data input

data output

data input

ground (0 V)

data output

data input

data output

supply voltage

9397 750 14545

Product data sheet

Rev. 03 — 31 January 2005

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

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