74LVC32A Просмотр технического описания (PDF) - Philips Electronics
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74LVC32A Datasheet PDF : 16 Pages
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Philips Semiconductors
Quad 2-input OR gate
Product specification
74LVC32A
FEATURES
• 5 V tolerant inputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
• Complies with JEDEC standard no. 8-1A
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74LVC32A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. This
feature allows the use of these devices as translators in a
mixed 3.3 and 5 V environment.
The 74LVC32A provides the 2-input OR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
tPHL/tPLH
CI
CPD
PARAMETER
propagation delay nA, nB to nY
input capacitance
power dissipation capacitance per gate
CONDITIONS
CL = 50 pF; VCC = 3.3 V
VCC = 3.3 V; notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
TYPICAL
2.1
4.0
15
UNIT
ns
pF
pF
ORDERING INFORMATION
TYPE NUMBER
74LVC32AD
74LVC32ADB
74LVC32APW
74LVC32ABQ
TEMPERATURE RANGE
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
PACKAGE
PINS
PACKAGE MATERIAL
14
SO14
plastic
14
SSOP14
plastic
14
TSSOP14 plastic
14
DHVQFN14 plastic
CODE
SOT108-1
SOT337-1
SOT402-1
SOT762-1
2003 Jul 16
2
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