74LVC1G66GW Просмотр технического описания (PDF) - Philips Electronics
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74LVC1G66GW Datasheet PDF : 22 Pages
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Philips Semiconductors
Bilateral switch
Product specification
74LVC1G66
FEATURES
• Very low ON resistance:
– 7.5 Ω (typical) at VCC = 2.7 V
– 6.5 Ω (typical) at VCC = 3.3 V
– 6 Ω (typical) at VCC = 5 V.
• Switch handling capability of 32 mA
• High noise immunity
• CMOS low power consumption
• Latch-up performance exceeds 100 mA per
JESD78 Class II
• Direct interface TTL-levels
• Multiple package options
• ESD protection:
– HBM EIA/JESD22-A114-B exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74LVC1G66 is a high-speed Si-gate CMOS device.
The 74LVC1G66 provides an analog switch. The switch
has two input/output pins (Y and Z) and an active HIGH
enable input pin (E). When pin E is LOW, the analog
switch is turned off.
QUICK REFERENCE DATA
Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
SYMBOL
PARAMETER
tPZH/tPZL
turn-ON time E to VOS
tPHZ/tPLZ
turn-OFF time E to VOS
CI
input capacitance
CPD
power dissipation capacitance
CS
switch capacitance
CONDITIONS
CL = 50 pF; RL = 500 Ω; VCC = 3 V
CL = 50 pF; RL = 500 Ω; VCC = 5 V
CL = 50 pF; RL = 500 Ω; VCC = 3 V
CL = 50 pF; RL = 500 Ω; VCC = 5 V
CL = 50 pF; fi = 10 MHz; VCC = 3.3 V;
notes 1 and 2
OFF-state
ON-state
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + {(CL + CS) × VCC2 × fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = switch capacitance in pF;
VCC = supply voltage in Volts;
2. The condition is VI = GND to VCC.
TYPICAL UNIT
2.5
ns
1.9
ns
3.4
ns
2.5
ns
2
pF
12.0
pF
6.5
pF
11
pF
2004 Apr 13
2
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