74LVC161 Просмотр технического описания (PDF) - Philips Electronics
Номер в каталоге
Компоненты Описание
Список матч
74LVC161 Datasheet PDF : 14 Pages
| |||
Philips Semiconductors
Presettable synchronous 4-bit binary counter;
asynchronous reset
Product specification
74LVC161
FUNCTIONAL DIAGRAM
3
4
5
6
9 PE
10 CET
7 CEP
2 CP
1 MR
D0
D1
D2
D3
PARALLEL LOAD
CIRCUITRY
BINARY
COUNTER
Q0
Q1
Q2
Q3
14
13
12
11
STATE DIAGRAM
TC 15
SY00068
0
1
2
3
4
15
5
14
6
13
7
12
11
10
9
8
SF00664
FUNCTION TABLE
OPERATING
INPUTS
OUTPUTS
MODES MR CP CEP CET PE Dn Qn TC
Reset (clear) L X X
X XX
L
L
H↑ X
X ll
L
L
Parallel load
H↑ X
X lh
H
*
Count
H↑ h
h h X count *
Hold
HX l
X hX
qn
*
(do nothing) H X X
l
hX
qn
L
NOTES:
* = The TC output is High when CET is High and the counter
is at Terminal Count (HHHH)
H = High voltage level
h = High voltage level one setup time prior to the Low-to-High
clock transition
L = Low voltage level
l = Low voltage level one setup time prior to the Low-to-High
clock transition
q = Lower case letters indicate the state of the referenced
output one setup time prior to the Low-to-High clock
transition
X = Don’t care
↑ = Low-to-High clock transition
TYPICAL TIMING SEQUENCE
MR
PE
D0
D1
D2
D3
CP
CEP
CET
Q0
Q1
Q2
Q3
TC
12 13 14 15 0 1 2
RESET PRESET
COUNT
INHIBIT
SY00069
Typical timing sequence: reset outputs to zero; preset to binary
twelve; count to thirteen, fourteen, fifteen, zero, one, and two;
inhibit
1998 May 20
4
Share Link: 