74HC3G34DC Просмотр технического описания (PDF) - NXP Semiconductors.

Номер в каталоге

Компоненты Описание

Список матч

74HC3G34DC

Triple buffer gate

NXP Semiconductors. 

NXP Semiconductors

74HC3G34; 74HCT3G34

Triple buffer gate

VI 90 %

tW

negative

pulse

VM

10 %

0V

tf

VI

positive

pulse

tr

90 %

VM

10 %

0V

tW

VM

tr

tf

VM

VI

G

VCC

VO

DUT

RT

VCC

RL S1

CL

open

001aad983

Fig 6.

Test data is given in Table 10.

Definitions for test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

CL = Load capacitance including jig and probe capacitance.

RL = Load resistance.

S1 = Test selection switch.

Test circuit for measuring switching times

Table 10. Test data

Type

Input

74HC3G34

74HCT3G34

VI

GND to VCC

GND to 3 V

tr, tf

≤ 6 ns

≤ 6 ns

Load

CL

50 pF

50 pF

RL

1 kΩ

1 kΩ

S1 position

tPHL, tPLH

open

open

74HC_HCT3G34_5

Product data sheet

Rev. 05 — 7 May 2009

© NXP B.V. 2009. All rights reserved.

7 of 13

Share Link: