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74HC4051 Просмотр технического описания (PDF) - Philips Electronics

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74HC4051
Philips
Philips Electronics Philips
74HC4051 Datasheet PDF : 17 Pages
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Philips Semiconductors
8-channel analog
multiplexer/demultiplexer
Product specification
74HC/HCT4051
FEATURES
Wide analog input voltage range: ± 5 V.
Low “ON” resistance:
80 (typ.) at VCC VEE = 4.5 V
70 (typ.) at VCC VEE = 6.0 V
60 (typ.) at VCC VEE = 9.0 V
Logic level translation:
to enable 5 V logic to communicate with ± 5 V analog
signals
Typical “break before make” built in
Output capability: non-standard
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4051 are high-speed Si-gate CMOS
devices and are pin compatible with the “4051” of the
QUICK REFERENCE DATA
VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
tPZH/ tPZL
tPHZ/ tPLZ
CI
CPD
CS
turn “ON” time
E to Vos
Sn to Vos
turn “OFF” time
E to Vos
Sn to Vos
input capacitance
power dissipation capacitance per switch
max. switch capacitance
independent (Y)
common (Z)
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4051 are 8-channel analog
multiplexers/demultiplexers with three digital select inputs
(S0 to S2), an active LOW enable input (E), eight
independent inputs/outputs (Y0 to Y7) and a common
input/output (Z).
With E LOW, one of the eight switches is selected (low
impedance ON-state) by S0 to S2. With E HIGH, all
switches are in the high impedance OFF-state,
independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital
control inputs (S0 to S2, and E). The VCC to GND ranges
are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The
analog inputs/outputs (Y0 to Y7, and Z) can swing between
VCC as a positive limit and VEE as a negative limit.
VCC VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).
CONDITIONS
CL = 15 pF; RL = 1 k;
VCC = 5 V
TYPICAL
HC
HCT
22
22
20
24
UNIT
ns
ns
notes 1 and 2
18
16
ns
19
20
ns
3.5
3.5
pF
25
25
pF
5
5
pF
25
25
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ { (CL + CS ) × VCC2 × fo } where:
fi = input frequency in MHz
fo = output frequency in MHz
{ (CL + CS) × VCC2 × fo } = sum of outputs
CL = output load capacitance in pF
CS = max. switch capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
December 1990
2

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