74HCT299N,652 Просмотр технического описания (PDF) - NXP Semiconductors.
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74HCT299N,652 Datasheet PDF : 24 Pages
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NXP Semiconductors
74HC299; 74HCT299
8-bit universal shift register; 3-state
Table 2.
Symbol
DSL
S1
VCC
Pin description …continued
Pin
18
19
20
6. Functional description
Description
serial data shift-left input
mode select input
positive supply voltage
Table 3. Function table[1]
Input
Response
MR
S1
S0
CP
L
X
X
X
asynchronous reset; Q0 to Q7 = LOW
H
H
H
↑
parallel load; I/On → Qn
H
L
H
↑
shift right; DSR → Q0, Q0 → Q1, etc.
H
H
L
↑
shift left; DSL → Q7, Q7 → Q6, etc.
H
L
L
X
hold
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW to HIGH CP transition;
X = don’t care.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
IIK
input clamping current
IOK
output clamping current
IO
output current
standard outputs
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
−0.5 V < VO < VCC + 0.5 V
−0.5 +7
V
[1] -
±20
mA
[1] -
±20
mA
-
±25
mA
bus driver outputs
-
±35
mA
ICC
supply current
standard outputs
-
50
mA
bus driver outputs
-
70
mA
IGND
ground current
standard outputs
−50
-
mA
bus driver outputs
−70
-
mA
Tstg
storage temperature
Ptot
total power dissipation
Tamb = −40 °C to +125 °C
DIP20 package
−65
[2] -
+150 °C
750
mW
SO20 package
[3] -
500
mW
(T)SSOP20 package
[4] -
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
74HC_HCT299_3
Product data sheet
Rev. 03 — 28 July 2008
© NXP B.V. 2008. All rights reserved.
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