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74ABT16899 Просмотр технического описания (PDF) - Philips Electronics

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74ABT16899 Datasheet PDF : 16 Pages
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Philips Semiconductors
18-bit latched transceiver with 16-bit
parity generator/checker (3-State)
PIN CONFIGURATION
ODD/EVEN 1
OEA 2
1A0 3
GND 4
1A1 5
1A2 6
1A3 7
1A4 8
VCC 9
1A5 10
1A6 11
1A7 12
1APAR 13
1ERRA 14
GND 15
2ERRA 16
2APAR 17
2A7 18
2A6 19
2A5 20
VCC 21
2A4 22
2A3 23
2A2 24
2A1 25
GND 26
2A0 27
LEB 28
PIN DESCRIPTION
SYMBOL
1A0 - 1A7
2A0 - 2A7
1B0 - 1B7
2B0 - 2B7
1APAR
2APAR
1BPAR
2BPAR
ODD/EVEN
OEA, OEB
SEL
LEA, LEB
1ERRA, 1ERRB
2ERRA, 2ERRB
GND
VCC
1998 Feb 25
56 SEL
55 LEA
54 1B0
53 GND
52 1B1
51 1B2
50 1B3
49 1B4
48 VCC
47 1B5
46 1B6
45 1B7
44 1BPAR
43 1ERRB
42 GND
41 2ERRB
40 2BPAR
39 2B7
38 2B6
37 2B5
36 VCC
35 2B4
34 2B3
33 2B2
32 2B1
31 GND
30 2B0
29 OEB
SH00082
PIN
NUMBER
3, 5, 6, 7, 8, 10, 11, 12
27, 25, 24, 23, 22, 20, 19, 18
54, 52, 51, 50, 49, 47, 46, 45
30, 32, 33, 34, 35, 37, 38, 39
13, 17
44, 40
1
2, 29
56
55, 28
14, 43,
16, 41
4, 15, 26, 31, 42, 53
9, 21, 36, 48
3
Product specification
74ABT16899
74ABTH16899
NAME AND FUNCTION
Latched A bus 3-State inputs/outputs
Latched B bus 3-State inputs/outputs
A bus parity 3-State input
B bus parity 3-State input
Parity select input (Low for EVEN parity)
Output enable inputs (gate A to B,
B to A)
Mode select input (Low for generate)
Latch enable inputs (transparent High)
Error signal outputs (active-Low)
Ground (0V)
Positive supply voltage

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