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74ABT16899

18-bit latched transceiver with 16-bit parity generator/checker (3-State)

Philips Electronics 

Philips Semiconductors

18-bit latched transceiver with 16-bit

parity generator/checker (3-State)

Product specification

74ABT16899

74ABTH16899

OEA,

OEB

VM

VM

tPZH

tPHZ

An, APAR,

Bn, BPAR

VOH –0.3V

VM

0V

SA00303

Waveform 11. 3-State Output Enable Time to High Level and Output Disable Time from High Level

OEA,

OEB

VM

VM

tPZL

tPLZ

An, APAR,

Bn, BPAR

VM

VOL +0.3V

SA00304

Waveform 12. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level

TEST CIRCUIT AND WAVEFORM

VCC

VIN

PULSE

GENERATOR

VOUT

RX

D.U.T.

RT

CL RL

VX

90%

NEGATIVE

PULSE

Test Circuit for Open Collector Outputs

POSITIVE

PULSE

10%

SWITCH POSITION

LOAD VALUES

TEST

tPLZ

tPZL

All other

SWITCH

closed

closed

open

OUTPUT

ERROR

All other

RX VX

100 Ω VCC

500 Ω 7.0V

tW

VM

10%

tTHL (tf )

VM

10%

tTLH (tr )

tTLH (tr )

90%

VM

tW

tTHL (tf )

90%

VM

Input Pulse Definition

90%

AMP (V)

0V

AMP (V)

10%

0V

DEFINITIONS:

RL = Load resistor; see AC CHARACTERISTICS for value.

CL = Load capacitance includes jig and probe capacitance;

see AC CHARACTERISTICS for value.

RT = Termination resistance should be equal to ZOUT of

pulse generators.

FAMILY

INPUT PULSE REQUIREMENTS

Amplitude Rep. Rate

tw

tR

74ABT/H16 3.0V

1MHz

500ns 2.5ns

tF

2.5ns

SH00009

1998 Feb 25

13

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