5962R9582401QQC Просмотр технического описания (PDF) - Intersil
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5962R9582401QQC Datasheet PDF : 16 Pages
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HS-80C85RH
TABLE 4. INSTRUCTION SET SUMMARY (Continued)
MNE-
INSTRUCTION CODE
OPERATIONS
MONIC D7 D6 D5 D4 D3 D2 D1 D0 DESCRIPTION
JM
1 1 1 1 1 0 1 0 Jump on minus
JPE
1 1 1 0 1 0 1 0 Jump on parity
even
JPO
1 1 1 0 0 0 1 0 Jump on parity odd
PCHL
1 1 1 0 1 0 0 1 H & L to program
counter
CALL
CALL
1 1 0 0 1 1 0 1 Call unconditional
CC
1 1 0 1 1 1 0 0 Call on carry
CNC
1 1 0 1 0 1 0 0 Call on no carry
LOGICAL
ANA r 1 0 1 0 0 S S S And register with A
XRA r
1 0 1 0 1 S S S Exclusive OR
register with A
ORA r 1 0 1 1 0 S S S OR register with A
CMP r
1 0 1 1 1 S S S Compare register
with A
ANA M 1 0 1 0 0 1 1 0 And memory with A
XRA M 1 0 1 0 1 1 1 0 Exclusive OR
memory with A
ORA M 1 0 1 1 0 1 1 0 OR memory with A
CMP M 1 0 1 1 1 1 1 0 Compare memory
with A
ANI
1 1 1 0 0 1 1 0 And immediate
with A
XRI
1 1 1 0 1 1 1 0 Exclusive OR
immediate with A
ORl
1 1 1 1 0 1 1 0 OR immediate
with A
CPl
1 1 1 1 1 1 1 0 Compare
immediate with A
ROTATE
RLC
0 0 0 0 0 1 1 1 Rotate A left
RRC
0 0 0 0 1 1 1 1 Rotate A right
RAL
0 0 0 1 0 1 1 1 Rotate A left
through carry
RAR
0 0 0 1 1 1 1 1 Rotate A right
through carry
INX H
0 0 1 0 0 0 1 1 Increment H & L
registers
DCX B 0 0 0 0 1 0 1 1 Decrement B & C
DCX D 0 0 0 1 1 0 1 1 Decrement D & E
DCX H 0 0 1 0 1 0 1 1 Decrement H & L
ADD
ADD r 1 0 0 0 0 S S S Add register to A
ADC r
1 0 0 0 1 S S S Add register to A
with carry
TABLE 4. INSTRUCTION SET SUMMARY (Continued)
MNE-
INSTRUCTION CODE
MONIC D7 D6 D5 D4 D3 D2 D1 D0
OPERATIONS
DESCRIPTION
ADD M 1 0 C 0 0 1 1 0 Add memory to A
ADC M 1 0 0 0 1 1 1 0 Add memory to A
with carry
ADl
1 1 0 0 0 1 1 0 Add immediate to A
ACl
1 1 0 0 1 1 1 0 Add immediate to
A with carry
DAD B 0 0 0 0 1 0 0 1 Add B & C to H & L
DAD D 0 0 0 1 1 0 0 1 Add D & E to H & L
DAD H 0 0 1 0 1 0 0 1 Add H & L to H & L
DAD SP 0 0 1 1 1 0 0 1 Add stack pointer
to H & L
SUBTRACT
SUB r
1 0 0 1 0 S S S Subtract register
from A
SBB r
1 0 0 1 1 S S S Subtract register
from A with borrow
SUB M 1 0 0 1 0 1 1 0 Subtract memory
from A
SBB M 1 0 0 1 1 1 1 0 Subtract memory
from A with borrow
SUl
1 1 0 1 0 1 1 0 Subtract
immediate from A
SBl
1 1 0 1 1 1 1 0 Subtract
immediate from A
with borrow
SPECIALS
CMA
0 0 1 0 1 1 1 1 Complement A
STC
0 0 1 1 0 1 1 1 Set carry
CMC
0 0 1 1 1 1 1 1 Complement carry
DAA
0 0 1 0 0 1 1 1 Decimal adjust A
CONTROL
El
1 1 1 1 1 0 1 1 Enable Interrupts
DI
1 1 1 1 0 0 1 1 Disable Interrupt
NOP
0 0 0 0 0 0 0 0 No-operation
HLT
0 1 1 1 0 1 1 0 Halt
RIM
0 0 1 0 0 0 0 0 Read Interrupt
Mask
SlM
0 0 1 1 0 0 0 0 Set Interrupt Mask
NOTES:
4. DDS or SSS: B000, C001, D010, E011, H100, L101, Memory
110, A111
5. Two possible cycle times (6/12) indicate instruction cycles
dependent on condition flags.
† All mnemonics copyrighted, Intel Corporation 1976
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