5962R9570801TXC Просмотр технического описания (PDF) - Intersil
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5962R9570801TXC Datasheet PDF : 3 Pages
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HS-6617RH-T
Functional Diagram
MSB
A10
A9
A8
A7
A6
A5
A4
LSB
P
E
LATCHED
ADDRESS
REGISTER
7A
7A
GATED
ROW
DECODER 128
128 x 128
MATRIX
E
E
16 16 16 16 16 16 16 16
8
GATE COLUMN
DECODER
8
PROGRAMMING, AND DATA
E
OUTPUT CONTROL
A4
A4
1 OF 8
G
ALL LINES POSITIVE LOGIC:
ACTIVE HIGH
THREE STATE BUFFERS:
A HIGH
OUTPUT ACTIVE
E
LATCHED ADDRESS
REGISTER
MSB
LSB
A3 A2 A1 A0
ADDRESS LATCHES & GATED DECODERS:
LATCH ON FALLING EDGE OF E
GATE ON FALLING EDGE OF G
P = HARDWIRED TO VDD EXCEPT DURING PROGRAMMING
Q0 - Q7
TRUTH TABLE
E
G
MODE
0
0
Enabled
0
1
Output Disabled
1
X
Disabled
Timing Waveform
ADDRESSES
TAVQV
1.5V
1.5V
VALID
ADDRESS
TAVEL
TELAX
TELEL
TELEH
1.5V
1.5V
E
TEHEL
TELQV
G
TGLQV
1.5V
TGLQX
DATA
OUTPUT
Q0 - Q7
TELQX
3.0V
VALID
ADDRESSES
0V
1.5V
1.5V
TGHQZ
VALID
DATA
3.0V
1.5V
0V
TEHQZ
3.0V
0V
TS
FIGURE 1. READ CYCLE
2
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