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3507

Triple Monolithic Step-Down Regulator with LDO

Linear Technology 

LT3507

APPLICATIONS INFORMATION

fMAX2 is the frequency at which the maximum duty cycle

is exceeded. If there is sufficient charge on the BOOST

capacitor, the regulator will skip OFF periods to increase

the overall duty cycle at frequencies about fMAX2. It will

continue to regulate but with increased inductor current

and greatly increased output ripple.

Note that the restriction on the operating input voltage

refers to steady-state limits to keep the output in regula-

tion; the circuit will tolerate input voltage transients up to

the absolute maximum rating.

Switching Frequency

Once the upper and lower bounds for the switching

frequency are found from the duty cycle requirements,

the frequency may be set within those bounds. Lower

frequencies result in lower switching losses, but require

larger inductors and capacitors. The user must decide

the best trade-off.

The switching frequency is set by a resistor connected

from the RT/SYNC pin to ground, or by forcing a clock

signal into RT/SYNC. The LT3507 applies a voltage of

~1.25V across this resistor and uses the current to set

the oscillator speed. The switching frequency is given by

the following formula:

fSW

=

55

RT + 12

where fSW is in MHz and RT is in kΩ.

The frequency sync signal will support VH logic levels from

1.8V to 5V CMOS or TTL. The duty cycle is not important,

but it needs a minimum on time of 100ns and a minimum

off time of 100ns. If the sync circuit is to be powered from

one of the LT3507 outputs there may be start-up problems

if the driving gate is high impedance without a supply or

pulls high or low at some intermediate supply voltage.

The circuit shown in Figure 2 prevents these problems by

isolating the clock sync circuit until the clock is operating.

The Schottky diode should be a low leakage type such as

the BAS70 from On Semi or CMOD6263 from Central Semi.

RT should be set to provide a frequency within ±25% of

the final sync frequency.

VCC

CLOCK

SYNC

CLK

470pF

1k

LT3507

BAS70

RT/SYNC SW1

RT

Figure 2. Clock Powered from LT3507 Output

VOUT1

3507 F02

Inductor Selection and Maximum Output Current

The current in the inductor is a triangle wave with an average

value equal to the load current. The peak switch current

is equal to the output current plus half the peak-to-peak

inductor ripple current. The LT3507 limits its switch current

in order to protect itself and the system from overload

faults. Therefore, the maximum output current that the

LT3507 will deliver depends on the switch current limit,

the inductor value and the input and output voltages.

When the switch is off, the potential across the inductor

is the output voltage plus the catch diode drop. This gives

the peak-to-peak ripple current in the inductor:

ΔIL

=

(1–

DC)

VOUT +

L•f

VF

where f is the switching frequency of the LT3507 and L

is the value of the inductor. The peak inductor and switch

current is:

ISWPK

=

ILPK

=

IOUT

+

ΔIL

2

To maintain output regulation, this peak current must

be less than the LT3507’s switch current limit, ILIM. For

SW1, ILIM is at least 3A at low duty cycles and decreases

linearly to 2.4A at DC = 0.8. For SW2 and SW3, ILIM is at

least 2A for at low duty cycles and decreases linearly to

1.6A at DC = 0.8.

The minimum inductance can now be calculated as:

LMIN

=

1− DCMIN

2•f

•

VOUT + VF

ILIM – IOUT

However, it’s generally better to use an inductor larger

than the minimum value. The minimum inductor has large

ripple currents which increase core losses and require

large output capacitors to keep output voltage ripple low.

3507f

11

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