74ABT16841 Просмотр технического описания (PDF) - Philips Electronics
Номер в каталоге
Компоненты Описание
Список матч
74ABT16841 Datasheet PDF : 10 Pages
| |||
Philips Semiconductors
20-bit bus interface latch (3-State)
Product specification
74ABT16841A
74ABTH16841A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25°C
Tamb = -40°C
to +85°C
UNIT
Min Typ Max Min Max
VIK
Input clamp voltage
VOH High-level output voltage
VOL
VRST
Low-level output voltage
Power-up output voltage3
VCC = 4.5V; IIK = -18mA
VCC = 4.5V; IOH = -3mA; VI = VIL or VIH
VCC = 5.0V; IOH = -3mA; VI = VIL or VIH
VCC = 4.5V; IOH = -32mA; VI = VIL or VIH
VCC = 4.5V; IOL = 64mA; VI = VIL or VIH
VCC = 5.5V; IO = 1mA; VI = GND or VCC
–0.9 –1.2
–1.2 V
2.5 2.9
2.5
V
3.0 3.4
3.0
V
2.0 2.4
2.0
V
0.42 0.55
0.55 V
0.13 0.55
0.55 V
II
Input leakage current
74ABT16841A
VCC = 5.5V; VI = VCC or GND
±0.01 ±1
±1.0 µA
II
Input leakage current
74ABTH16841A
VCC = 5.5V; VI = VCC or GND
VCC = 5.5V; VI = VCC
VCC = 5.5V; VI = 0
Control pins
Data pins5
±0.01 ±1
0.01 1
–2 –3
±1 µA
1
µA
–5 µA
IHOLD
Bus Hold current inputs6
74ABTH16841A
VCC = 4.5V; VI = 0.8V
VCC = 4.5V; VI = 2.0V
VCC = 5.5V; VI = 0 to 5.5V
35
–75
±800
35
–75
µA
IOFF
Power-off leakage current
VCC = 0.0V; VO or VI ≤ 4.5V
±5.0 ±100
±100 µA
IPU/PD
Power-up/down 3-State
output current4
VCC = 2.1V; VO = 0.5V; VI = GND or VCC;
VOE = Don’t care
±5.0 ±50
±50 µA
IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH
5.0 10
10 µA
IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH
–5.0 –10
–10 µA
ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC
5.0 50
50 µA
IO
Output current1
VCC = 5.5V; VO = 2.5V
–50 –70 –180 –50 –180 mA
ICCH
VCC = 5.5V; Outputs High, VI = GND or VCC
0.5
1
1
mA
ICCL Quiescent supply current
VCC = 5.5V; Outputs Low, VI = GND or VCC
10 19
19 mA
ICCZ
VCC = 5.5V; Outputs 3-State; VI = GND or VCC
0.5
1
1
mA
∆ICC
Additional supply current per VCC = 5.5V; one input at 3.4V, other inputs at
input pin2
VCC or GND
0.2
1
1
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a
transition time of up to 100µsec is permitted.
5. Unused pins at VCC or GND.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
SYMBOL
PARAMETER
WAVEFORM
tPLH
Propagation delay
tPHL
nDx to nQx
2
tPLH
Propagation delay
tPHL
nLE to nQx
1
tPZH
Output enable time
4
tPZL
to High and Low level
5
tPHZ
Output disable time
4
tPLZ
from High and Low level
5
LIMITS
Tamb = +25oC
VCC = +5.0V
MIN
TYP
MAX
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
MIN
MAX
1.1
3.1
4.1
1.1
4.9
1.5
2.2
3.1
1.5
3.6
1.5
2.5
3.3
1.5
3.7
1.0
2.1
2.8
1.0
3.1
1.2
2.4
3.2
1.2
4.0
1.2
2.2
2.9
1.2
3.6
1.8
3.0
4.0
1.8
4.9
1.5
2.5
3.2
1.5
3.7
UNIT
ns
ns
ns
ns
1998 Feb 27
5
Share Link: 