P4C150-35LMB Просмотр технического описания (PDF) - Performance Semiconductor
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P4C150-35LMB Datasheet PDF : 8 Pages
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P4C150
AC CHARACTERISTICS—READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Sym.
Parameter
tRC Read Cycle Time
tAA Address Access Time
tAC Chip Select Access Time
tOH
Output Hold from
Address Change
tLZ
Chip Enable to
Output in Low Z
tHZ
Chip Disable to
Output in High Z
-10
-12
-15
-20
-25
-35
Min Max Min Max Min Max Min Max Min Max Min Max
10
12
15
20
25
35
10
12
15
20
25
35
8
10
12
14
15
35
2
2
2
2
2
2
2
2
2
2
2
2
4
6
8
10
13
15
Unit
ns
ns
ns
ns
ns
ns
tOE
Output Enable to
Data Valid
7
9
10
14
15
20
ns
t
Output Enable to
OLZ Output in Low Z
2
2
2
2
2
2
ns
t
Output Disable to
OHZ Output in High Z
5
7
9
11
13
16
ns
TIMING WAVEFORM OF READ CYCLE NO. 1(5,6)
(8)
t RC
ADDRESS
DATA OUT
t AA
t OH
PREVIOUS DATA VALID
DATA VALID
TIMING WAVEFORM OF READ CYCLE NO. 2 (CS CONTROLLED)(5, 7)
CS
DATA OUT
OE
tRC
tAC (7)
(8)
t LZ
(8)
t OLZ
t OE
tHZ (8)
DATA VALID
tOHZ (8)
HIGH IMPEDANCE
Notes:
5.WE is HIGH for READ cycle.
6.CS and OE are LOW for READ cycle.
7.ADDRESS must be valid prior to, or concident with, CS transition
LOW, tAA must still be met.
8. Transition is measured ±200 mV from steady state volt-
age prior to change, with loading as specified in Figure 1.
9. Read Cycle Time is measured from the last valid address
to the first transitioning address.
27
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