AD5313ARU(RevA) Просмотр технического описания (PDF) - Analog Devices

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AD5313ARU
(Rev.:RevA)

2.5 V to 5.5 V, 230 μ
A, Dual Rail-to-Rail Voltage Output 8-/10-/12-Bit DACs

Analog Devices 

AD5303/AD5313/AD5323–SPECIFICATIONS (VDD = 2.5 V to 5.5 V; VREF = 2 V; RL = 2 k⍀ to GND;

CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted.)

Parameter1

A Version2

B Version2

Min Typ

Max Min Typ

Max Unit

Conditions/Comments

DC PERFORMANCE3, 4

AD5303

Resolution

Relative Accuracy

Differential Nonlinearity

AD5313

Resolution

Relative Accuracy

Differential Nonlinearity

AD5323

Resolution

Relative Accuracy

Differential Nonlinearity

Offset Error

Gain Error

Lower Deadband

Offset Error Drift5

Gain Error Drift5

Power Supply Rejection Ratio5

DC Crosstalk5

DAC REFERENCE INPUTS5

VREF Input Range

1

0

VREF Input Impedance

Reference Feedthrough

Channel-to-Channel Isolation

8

± 0.15

± 0.02

10

± 0.5

± 0.05

12

±2

± 0.2

± 0.4

± 0.15

10

–12

–5

–60

30

>10

180

90

–90

–80

±1

± 0.25

±4

± 0.5

± 16

±1

±3

±1

60

8

± 0.15

± 0.02

10

± 0.5

± 0.05

12

±2

± 0.2

± 0.4

± 0.15

10

–12

–5

–60

30

VDD 1

VDD 0

>10

180

90

–90

–80

Bits

± 0.5 LSB

± 0.25 LSB

Guaranteed Monotonic by Design over All Codes

Bits

± 2 LSB

± 0.5 LSB

Guaranteed Monotonic by Design over All Codes

Bits

± 8 LSB

± 1 LSB

Guaranteed Monotonic by Design over All Codes

± 3 % of FSR

See Figures 3 and 4

± 1 % of FSR

See Figures 3 and 4

60 mV

See Figures 3 and 4

ppm of FSR/°C

ppm of FSR/°C

dB

⌬VDD = ± 10%

µV

VDD V

VDD V

MΩ

kΩ

kΩ

dB

dB

Buffered Reference Mode

Unbuffered Reference Mode

Buffered Reference Mode

Unbuffered Reference Mode

0 V to VREF Output Range, Input Impedance = RDAC

Unbuffered Reference Mode

0 V to 2 VREF Output Range, Input Impedance = RDAC

Frequency = 10 kHz

Frequency = 10 kHz

OUTPUT CHARACTERISTICS5

Minimum Output Voltage6

Maximum Output Voltage6

DC Output Impedance

Short Circuit Current

Power-Up Time

LOGIC INPUTS5

Input Current

VIL, Input Low Voltage

VIH, Input High Voltage

2.4

2.1

2.0

Pin Capacitance

0.001

VDD – 0.001

0.5

50

20

2.5

5

±1

0.8

0.6

0.5

2

3.5

0.001

VDD – 0.001

0.5

50

20

2.5

5

±1

0.8

0.6

0.5

2.4

2.1

2.0

2

3.5

V min

V max

Ω

mA

mA

µs

µs

µA

V

V

V

V

V

V

pF

This is a measure of the minimum and maximum

drive capability of the output amplifier.

VDD = 5 V

VDD = 3 V

Coming out of Power-Down Mode. VDD = 5 V

Coming out of Power-Down Mode. VDD = 3 V

VDD = 5 V ± 10%

VDD = 3 V ± 10%

VDD = 2.5 V

VDD = 5 V ± 10%

VDD = 3 V ± 10%

VDD = 2.5 V

LOGIC OUTPUT (SDO)5

VDD = 5 V ± 10%

Output Low Voltage

Output High Voltage

4.0

VDD = 3 V ± 10%

Output Low Voltage

Output High Voltage

2.4

Floating-State Leakage Current

Floating State O/P Capacitance

3

0.4

4.0

0.4

2.4

1

3

0.4 V

V

0.4 V

V

1

µA

pF

ISINK = 2 mA

ISOURCE = 2 mA

ISINK = 2 mA

ISOURCE = 2 mA

DCEN = GND

DCEN = GND

POWER REQUIREMENTS

VDD

IDD (Normal Mode)

VDD = 4.5 V to 5.5 V

VDD = 2.5 V to 3.6 V

IDD (Full Power-Down)

VDD = 4.5 V to 5.5 V

VDD = 2.5 V to 3.6 V

2.5

300

230

0.2

0.05

5.5 2.5

450

300

350

230

1

0.2

1

0.05

5.5 V

450 µA

350 µA

1

µA

1

µA

IDD specification is valid for all DAC codes.

Both DACs Active and Excluding Load Currents

Both DACs in Unbuffered mode. VIH = VDD and

VIL = GND. In Buffered mode, extra current is

typically x µA per DAC where x = 5 µA + VREF/RDAC.

–2–

REV. A

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