ML4769 Просмотр технического описания (PDF) - Micro Linear Corporation
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ML4769 Datasheet PDF : 8 Pages
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DESIGN CONSIDERATIONS (Continued)
In applications where the ML4769 is operated at or near
the maximum output current, it is recommended to add a
10nF to 100nF ceramic capacitor from VOUT to GND. The
optimum value of the high frequency bypass capacitor is
dependent on the layout and the value of the bulk output
capacitor selected.
INPUT CAPACITOR
Due to the high input current drawn at startup and
possibly during operation, it is recommended to decouple
the input with a capacitor with a value of 47µF to 100µF.
This filtering prevents the input ripple from affecting the
ML4769 control circuitry, and also improves the
efficiency by reducing the I2R losses during the charge
cycle of the inductor. Again, a low ESR capacitor (such as
tantalum) is recommended.
It is also recommended that low source impedance
batteries be used. Otherwise, the voltage drop across the
source impedance during high input current situations will
cause the ML4769 to fail to start up or to operate
unreliably. In general, for two cell applications the source
impedance should be less than 400mW, which means that
small alkaline cells should be avoided.
SHUTDOWN
The input levels of the SHDN pin are CMOS compatible.
To guarantee proper operation, SHDN must be pulled to
within 0.5V of GND or VIN to prevent excessive power
dissipation and possible oscillations.
SETTING THE OUTPUT VOLTAGE
The adjustable output of the ML4769 requires an external
feedback resistor divider to set VOUT. The output voltage
can be determined from the following equation:
VOUT
=
2.57
(R1+ R2)
R2
(3)
where R1 and R2 are connected as shown in Figure 2. The
value of R2 should be 250kW or less to minimize bias
current errors. Choose an appropriate value for R2 and
calculate R1.
LAYOUT
Good layout practices will ensure proper operation of the
ML4769. Some layout guidelines follow:
• Use adequate ground and power traces or planes
• Keep components as close as possible to the ML4769
• Use short trace lengths from the inductor to the VL1 and
VL2 pins and from the output capacitor to the VOUT pin
ML4769
LAYOUT (Continued)
• Use a single point ground for the ML4769 PWR GND
pin and the input and output capacitors, and connect
the GND pin to PWR GND using a separate trace
• Separate the ground for the converter circuitry from the
ground of the load circuitry and connect at a single
point
• Route the feedback trace away from the VL2 trace to
avoid noise pickup
• Route the high frequency bypass capacitor from a
VOUT location near the output voltage setting resistor
to the GND pin
DESIGN EXAMPLE
In order to design a boost converter using the ML4769,
it is necessary to define the values of a few parameters.
For this example, assume that VIN = 3.0V to 3.6V,
VOUT = 5.0V, and IOUT(MAX) = 250mA.
First, it must be determined whether the ML4769 is
capable of delivering the output current. This is done
using Equation 1:
! 20 5 7"$# IOUT(MAX) =
3 0.0392 5 + 0.488 - 0.144A = 266mA
5
The next step is to select an inductor. As previously
mentioned, the recommended inductance is 10µH. Make
sure that the peak current rating of the inductor is at least
1.0A, and that the DC resistance of the inductor is
between 50mW and 100mW.
Finally, the value of the output capacitor is determined
using Equation 2:
COUT
=
44 10mH
5.0V
= 88mF
The closest standard value would be a 100µF capacitor
with an ESR rating of 100mW. If such a low ESR value
cannot be found, two 47µF capacitors in parallel could
also be used. Since the 250mA output current requirement
is close to the 266mA maximum, a 10nF capacitor from
VOUT to GND is recommended.
Finally, the values of R1 and R2 are calculated using
equation 3. Assuming R2 = 250kW:
R1= 5.0V 250kW - 250kW = 236kW
2.57
The complete circuit is shown in Figure 8. As mentioned
previously, the use of an input supply bypass capacitor is
strongly recommended.
7
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