MAX5813AUD-T Просмотр технического описания (PDF) - Maxim Integrated
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MAX5813AUD-T
Maxim Integrated
MAX5813AUD-T Datasheet PDF : 30 Pages
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MAX5813/MAX5814/MAX5815
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 2.7V to 5.5V, VDDIO = 1.8V to 5.5V, VGND = 0V, CL = 200pF, RL = 2kI, TA = -40NC to +125NC, unless otherwise noted. Typical
values are at TA = +25NC.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
Input Low Voltage (Note 11)
2.2V < VDDIO < 5.5V
VIL
1.8V < VDDIO < 2.2V
Hysteresis Voltage
Input Leakage Current
Input Capacitance (Note 10)
ADDR_ Pullup/Pulldown Strength
DIGITAL OUTPUT (SDA)
VH
IIN
CIN
RPU, RPD
VIN = 0V or VDDIO (Note 11)
(Note 12)
Output Low Voltage
VOL
ISINK = 3mA
I2C TIMING CHARACTERISTICS (SCL, SDA, LDAC, CLR)
SCL Clock Frequency
fSCL
Bus Free Time Between a STOP
and a START Condition
tBUF
Hold Time Repeated for a
START Condition
SCL Pulse Width Low
SCL Pulse Width High
Setup Time for Repeated START
Condition
Data Hold Time
Data Setup Time
SDA and SCL Receiving
Rise Time
SDA and SCL Receiving
Fall Time
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tr
tf
SDA Transmitting Fall Time
Setup Time for STOP Condition
Bus Capacitance Allowed
Pulse Width of Suppressed Spike
CLR Removal Time Prior to a
Recognized START
CLR Pulse Width Low
LDAC Pulse Width Low
SCLK Rise to LDAC Fall to Hold
tf
tSU;STO
CB
tsp
VDD = 2.7V to 5.5V
tCLRSTA
tCLPW
tLDPW
tLDH
Applies to execution edge
MIN TYP MAX UNITS
0.3 x
VDDIO
V
0.2 x
VDDIO
0.15
V
Q0.1
Q1
FA
3
pF
30
50
90
kI
0.2
V
400
kHz
1.3
Fs
0.6
Fs
1.3
Fs
0.6
Fs
0.6
Fs
0
900
ns
100
ns
20 +
CB/10
300
ns
20 +
CB/10
300
ns
20 +
CB/10
0.6
250
ns
Fs
10
400
pF
50
ns
100
ns
20
ns
20
ns
400
ns
Maxim Integrated
6
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