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EPF011A

Generic MCU with 64K Embedded Flash

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User Guide — EPF011ACD_UG V0.2

2.4 Operation Modes

The chip provides 2 operation modes depending on pin status at OP_MODE pins.

2.4.1 Normal mode (OP_MODE = 0)

The chip is in normal operation. Program starts from $0000 upon reset.

2.4.2 ICP mode (OP_MODE = 1)

The chip is operating the same as in normal mode except that program starts from $F800 upon reset. $F800

is the starting address of ICP boot-loader which downloads the main codes from external and programs

into the Flash from $0000 to $EFFF. Note that if the chip is operating in normal mode but the first byte of

the Flash ($0000) is found erased ($FF), the chip will jump to $F800 to start ICP boot-loader upon reset.

2.5 Memory Organization

There are 3 memory areas in this chip:

1. 64K bytes of Program Flash Memory from $0000 to $FFFF

2. 256 bytes of Direct Data RAM from $00 to $FF

3. 2K bytes of Auxiliary Data RAM from $F800 to $FFFF

2.5.1 Program Flash Memory

The Program Flash Memory is a Flash type program memory which can be erased/programmed on-chip.

So, In Circuit Programming (ICP) is supported. This 64KB Flash memory store the codes to be executed

by the CPU. After reset the CPU starts program execution from location $0000 in normal mode and $F800

in ICP mode. ICP loader should start from $F800. In normal mode, if the content of $0000 is erased, the

program execution will start from location $F800 automatically.

2.5.2 Direct Data RAM

The Direct Data RAM is a read/write type data memory which is addressed by 8-bit short address. This

memory is divided into lower part ($00 ~ $7F) and upper part ($80 ~ $FF).

The lower part contains CPU working registers and bit-addressable memory. The lowest 32 bytes ($00 ~

$1F) form four banks or eight registers (R0~R7). Two bits in the PSW (Program Status Word) select which

bank is in use. The next 16 bytes ($20 ~ $2F) form a block of bit-addressable memory space at bit addresses

$00~$7F. This part of Direct Data RAM can be accessed by either direct or indirect addressing.

The upper part of Direct Data RAM can only be accessed by indirect addressing. Using direct addressing

to access this part of memory will actually access the SFR (Special Function Register) which is not part of

this memory.

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