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AD8305ACPZ-R2

100 dB Range (10 nA to 1 mA) Logarithmic Converter

Analog Devices 

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AD8305

VRDZ 1

VREF 2

IREF 3

INPT 4

AD8305

TOP VIEW

(Not to Scale)

12 VOUT

11 SCAL

10 BFIN

9 VLOG

NOTES

1. THE EXPOSED PAD MUST BE

SOLDERED TO GROUND.

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No. Mnemonic

Function

1

VRDZ

Top of a Resistive Divider Network that Offsets VLOG to Position the Intercept. Normally connected to VREF; may also

be connected to ground when bipolar outputs are to be provided.

2

VREF

Reference Output Voltage of 2.5 V.

3

IREF

Accepts (Sinks) Reference Current, IREF.

4

INPT

Accepts (Sinks) Photodiode Current, IPD. Usually connected to photodiode anode such that photo current

flows into INPT.

5

VSUM

Guard Pin. Used to shield the INPT current line and for optional adjustment of the INPT and IREF node potential.

6, 7

VNEG

Optional Negative Supply, VN (this pin is usually grounded; for details of usage, see the Applications section.

8

VPOS

Positive Supply, (VP − VN ) ≤ 12 V.

9

VLOG

Output of the Logarithmic Front End.

10

BFIN

Buffer Amplifier Noninverting Input.

11

SCAL

Buffer Amplifier Inverting Input.

12

VOUT

Buffer Output.

13 to 16 COMM

Analog Ground.

EPAD

The exposed pad must be soldered to ground.

Rev. C | Page 5 of 24

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