AD8342 Просмотр технического описания (PDF) - Analog Devices

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AD8342

Active Receive Mixer LF to 3 GHz

Analog Devices 

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AD8342

VPLO 1

LOCM 2

LOIN 3

COMM 4

PIN 1

INDICATOR

AD8342

TOP VIEW

(Not to Scale)

12 VPDC

11 PWDN

10 EXRB

9 COMM

Figure 2. 16-Lead LFCSP

Table 5. Pin Function Descriptions

Pin No.

Mnemonic Function

1

VPLO

Positive Supply Voltage for the LO Buffer: 4.75 V to 5.25 V.

2

LOCM

AC Ground for Limiting LO Amplifier. Internally biased to Vs − 1.6 V. AC-couple to ground.

3

LOIN

LO Input. Nominal input level 0 dBm. Input level range −10 dBm to +4 dBm (relative to 50 Ω). Internally

biased to Vs − 1.6 V. AC-couple.

4, 5, 8, 9, 13 COMM

Device Common (DC Ground).

6, 7

IFOM, IFOP Differential IF Outputs (Open Collectors). Each requires dc bias of 5.00 V (nominal).

10

EXRB

Mixer Bias Voltage. Connect resistor from EXRB to ground. Typical value of 1.82 kΩ sets mixer current to

nominal value. Minimum resistor value from EXRB to ground = 1.8 kΩ. Internally biased to 1.17 V.

11

PWDN

Connect to Ground for Normal Operation. Connect pin to VS for disable mode.

12

VPDC

Positive Supply Voltage for the DC Bias Cell: 4.75 V to 5.25 V.

14

RFCM

AC Ground for RF Input. Internally biased to 2.4 V. AC-couple to ground.

15

RFIN

RF Input. Internally biased to 2.4 V. Must be ac-coupled.

16

VPMX

Positive Supply Voltage for the Mixer: 4.75 V to 5.25 V.

Rev. 0 | Page 7 of 20

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