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ZR36057 Просмотр технического описания (PDF) - Zoran Corporation

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ZR36057
ZORAN
Zoran Corporation ZORAN
ZR36057 Datasheet PDF : 48 Pages
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Enhanced PCI Bus Multimedia Controller
10.0 RESET
There are three means of resetting the ZR36057. One is a
hardware reset, which is applied through the PCIRST input, the
second is a software reset, which is applied through the SoftRe-
set register bit. The third is the JPEG Process Reset asserted by
the P_reset register bit.
10.1 Hardware Reset
The hardware reset signal PCIRST resets the internal state
machines in the ZR36057 and loads all registers with their
default states. The reset state of the PCI interface pins is as
defined by the PCI specifications (2.1). The reset state of the
other output/bidirectional signals is as follows.
The GPIO[7:0] lines are all inputs after reset. If required for
system purposes, they can be pulled high or low through 1 K
external resistors to have fixed values on reset.
As long as PCIRST is asserted, the following signals are tri-
stated: GDAT[7:0], GADR[2:0], GCS[3:0], GWR, GRD, SDA,
SCL. Once the PCIRST input is deasserted, these signals go to
their software reset condition (as does the entire device).
A hardware reset asserts (clears) the SoftReset bit in the system
register. After the hardware reset is over, the ZR36057 will be in
software reset condition until the SoftReset bit is deasserted.
10.2 Software Reset
There are two ways in which the ZR36057 can go into the
software reset condition: one is right after hardware reset (i.e.,
upon the low to high transition of PCIRST), the other is by
clearing the SoftReset bit.
While in software reset, all registers and state machines in the
device are reset to their default values/states, except the Soft-
Reset bit itself, and the PCI Interface (including the PCI
configuration space registers).
The device continues to respond according to the PCI Specifica-
tion and can be the target of a PCI transfer targeted at the ASRs
(Application Specific Registers) or PCI Configuration Space.
While in software reset the device will not initiate any PCI trans-
fers, because all DMA channels are disabled.
After the SoftReset bit is deasserted, all registers retain their
default values, all DMA channels remain disabled and all ASRs
are programmable according to their “normal” modification
conditions.
Hence, the initialization of the device (loading all registers with
the values required for the specific application) must start with
setting SoftReset to ‘1’, otherwise new ASR values will not be
latched in.
10.3 JPEG P_reset
The P_reset bit resets all of the JPEG related state machines
and controls in the ZR36057.
The P_reset bit enables re-configuration of all JPEG parameters
with no effect on the other functions of the device.
Before starting a new JPEG process, and while loading new
JPEG parameters, the P_reset bit must be asserted.
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