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TB1274BFG

TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC

Toshiba 

PIN

No.

PIN NAME

8 D-GND

FUNCTION

GND

pin

for

DDS/BUS/V-CD/H-CD sections.

9 HS

Output pin of horizontal

synchronizing signal.

Minimum pull-down resister is

2.7kΩ.

10 SCP

Sand Castle Pulse output pin.

The clamping pulse and the

horizontal blanking pulse are

outputted.

11 Yvi-OUT

Output pin to synchronize

inputs. Y signal from video-SW is

outputted.

12 SYNC-VCC

Power supply pin for liner

SYNC/HVCO sections.

INTERFACE CIRCUIT

－

12

9

50Ω

16

12

10

50Ω

16

12

TB1274BFG

INPUT / OUTPUT

SIGNALS

Hi

Low

3.8V≦Hi≦4.6V

0≦Low≦1.0V

CP

H-BLK

Low

3.6V≦CP≦4.4V

1.6V≦H-BLK≦2.4V

0.0V≦Low≦0.8V

with pull-down

resister (7.5kΩ)

11

50Ω

－

1Vp-p(with sync)

DC : 2.1V

16

6

DC 5V

13 SCL

SCL pin for I2CBUS.

3kΩ

13

SCL SCL

8

6

14 SDA

15

YS3

(RGB1-in)

16 SYNC-GND

SDA pin for I2CBUS.

50Ω

14

3kΩ

ACK

SDA SDA

Pin to switch main signals and

RGB1 signals. If the voltage of

this pin is HI and the

RGB1-ENB data is “enable” via

I2C BUS, RGB1-IN is selected.

And its status is responded to

the Read Bus data.

GND pin for liner SYNC/HVCO

sections.

32

6kΩ

15

28

－

8

1.0V≦RGB1≦5.0V

(Th : 0.7V)

4

2005-08-18

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