74ABT16500CMTD Просмотр технического описания (PDF) - Fairchild Semiconductor
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74ABT16500CMTD Datasheet PDF : 9 Pages
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AC Operating Requirements
Symbol
Parameter
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tW(H)
tW(L)
tW(H)
tW(L)
Setup Time,
A to CLKAB
Hold Time,
A to CLKAB
Setup Time,
B to CLKBA
Hold Time,
B to CLKBA
Setup Time, A to LEAB
or B to LEBA, CLK HIGH
Hold Time, A to LEAB
or B to LEBA, CLK HIGH
Setup Time, A to LEAB
or B to LEBA, CLK LOW
Hold Time, A to LEAB
or B to LEBA, CLK LOW
Pulse Width,
LEAB or LEBA, HIGH
Pulse Width, CLKAB
or CLKBA, HIGH or LOW
TA = +25°C
VCC = +5V
CL = 50 pF
Min
Max
4.5
4.5
0
0
4.0
4.0
0
0
1.5
1.5
1.5
1.5
4.5
4.5
1.5
1.5
3.3
3.3
3.3
3.3
TA = −40°C to +85°C
VCC = 4.5V–5.5V
CL = 50 pF
Min
Max
4.5
4.5
0
0
4.0
4.0
0
0
1.5
1.5
1.5
1.5
4.5
4.5
1.5
1.5
3.3
3.3
3.3
3.3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Extended AC Electrical Characteristics
TA = −40°C to +85°C
TA = −40°C to +85°C TA = −40°C to +85°C
VCC = 4.5V–5.5V
VCC = 4.5V–5.5V
VCC = 4.5V–5.5V
Symbol
Parameter
CL = 50 pF
18 Outputs Switching
CL = 250 pF
1 Output Switching
CL = 250 pF
18 Outputs Switching
Units
(Note 10)
(Note 11)
(Note 12)
Min
Typ
Max
Min
Max
Min
Max
tPLH
Propagation Delay
1.5
tPHL
Data to Outputs
1.5
tPLH
Propagation Delay
1.5
tPHL
LEAB or LEBA to B or A
1.5
tPLH
Propagation Delay
1.5
tPHL
CLKAB or CLKBA to B or A
1.5
6.5
2.0
7.0
2.5
9.9
ns
6.5
2.0
7.0
2.5
9.2
6.0
2.0
7.5
2.5
8.5
ns
6.0
2.0
7.5
2.5
8.5
6.2
2.0
7.7
2.5
8.5
ns
6.2
2.0
7.7
2.5
8.5
tPZH
Output Enable Time
1.5
tPZL
1.5
6.5
2.0
7.0
2.5
8.5
ns
6.5
2.5
7.0
2.5
8.5
tPHZ
Output Disable
1.5
6.5
(Note 13)
(Note 13)
ns
tPLZ
Time
1.5
6.5
Note 10: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 11: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 12: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 13: 3-STATE delays are dominated by the RC network (500Ω, 250 pF) on the output and have been excluded from the datasheet.
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