MT9M011 Просмотр технического описания (PDF) - Micron Technology
Номер в каталоге
Компоненты Описание
Список матч
MT9M011 Datasheet PDF : 41 Pages
| |||
Preliminary‡
MT9M011 - 1/3-Inch Megapixel Image Sensor
Pixel Data Format
Output Data Timing
The data output of the MT9M011 is synchronized with the PIXCLK output. When
LINE_VALID is HIGH, one 10-bit pixel datum is output every PIXCLK period. The PIX-
CLK signal is nominally the inverted of the master clock, allowing PIXCLK to be used as a
clock to latch the data. It is continuously enabled, even during the blanking period. The
MT9M011 can be programmed to delay the PIXCLK edge relative to the DOUT transitions
from 0 to 3.5 master clocks, in steps of one-half of a master clock. This is achieved by
programming the corresponding bits in Reg0x0A. The parameters P, A, and Q in Figure 7
are defined in Table 3 on page 10. The high time is defined as parameter A = (Reg0x04 x
PIXCLK_PERIOD).
Figure 6: Timing Example of Pixel Data
LINE_VALID
PIXCLK
Blanking
Valid Image Data
....
....
....
Blanking
DOUT9-DOUT0
(9P:00)
(9P:10)
P2
(9:0)
(9P:30)
(9P:40) . . . . P(9n:0-1)
(9P:n0)
Figure 7: Row Timing and FRAME_VALID/LINE_VALID Signals
...
FRAME_VALID
...
LINE_VALID
Number of master clocks P A
Q
...
A
Q
A
P
PDF: 09005aef81051c04/Source: 09005aef8102abe8
MT9M011_2.fm - Rev. D 1/05 EN
9
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
Share Link: 