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MN66710

Full-Function DAB Receiver LSI

Panasonic Corporation 

MN66710

I Electrical Characteristics (continued)

3. DC Characteristics at VDD = 3.0 V to 3.6 V, VREF5 = 4.75 V to 5.25 V, VSS = 0.00 V, fTEST = 24.576 MHz,

Ta = −30°C to +85°C (continued)

Parameter

Symbol

Conditions

Min

Typ

Max Unit

TTL level I/O pins: FSYO, CTLLR, DAOUT, CIRSYN, CTLCLK, CTLDAT

High-level input voltage

Low-level input voltage

High-level output voltage

Low-level output voltage

Output leakage current

VIH

2.2



VIL

0



VOH IOH = −4.0 mA

VI = VDD or VSS

2.4



VOL IOL = 4.0 mA

VI = VDD or VSS





ILO

VO = High-impedance state





VI = 5.25 V or VSS

VO = 5.25 V or VSS

TTL level I/O pins: RAD9, RDT0 to RDT3, NRCAS, NRRAS, NRAMOE, NRAMWE

High-level input voltage

Low-level input voltage

High-level output voltage

Low-level output voltage

Output leakage current

VIH

2.2



VIL

0



VOH IOH = −8.0 mA

VI = VDD or VSS

2.4



VOL IOL = 8.0 mA

VI = VDD or VSS





ILO

VO = High-impedance state





VI = 5.25 V or VSS

VO = 5.25 V or VSS

VREF5

V

0.6

V



V

0.4

V

±10

µA

VREF5

V

0.6

V



V

0.4

V

±10

µA

4. AC Characteristics at VDD = 3.0 V to 3.6 V, VREF5 = 4.75 V to 5.25 V, VSS = 0.00 V, fTEST = 24.576 MHz,

Ta = −30°C to +85°C

Parameter

Symbol

Conditions

Min Typ Max Unit

Clock input

MCLK24 clock period

MCLK24 high-level period

MCLK24 low-level period

Microcontroller interface

tMCLK

tMCLKH

tMCLKL

See figure 1.

36 40.69 45 ns

18   ns

15   ns

MPUCLK clock period

tMPUC See figure 2.

MPUCLK high-level period

tMPUCH

MPUCLK low-level period

tMPUCL

Note) The symbol T in the table refers to the MCLK24 period, tMCLK.

4 × T   ns

72   ns

60   ns

10

SDC00041BEM

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