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W83194BR-730(2000) Просмотр технического описания (PDF) - Winbond

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W83194BR-730
(Rev.:2000)
Winbond
Winbond Winbond
W83194BR-730 Datasheet PDF : 14 Pages
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W83194BR-730
166MHZ CLOCK FOR SIS CHIPSET
1.0 GENERAL DESCRIPTION
The W83194BR-730 is a Clock Synthesizer which provides all clocks required for high-speed RISC or
CISC microprocessor such as AMD K7. W83194BR-730 provides 64 CPU/PCI frequencies which are
selectable with smooth transitions by hardware or software. W83194BR-730 also provides 13 SDRAM
clocks.
The W83194BR-730 provides step-less frequency programming by controlling the VCO freq. and the
programmable PCI clock output divisor ratio. A watch dog timer is quipped and when time out, the
RESET# pin will output 4ms pulse signal.
The W83194BR-730 accepts a 14.318 MHz reference crystal as its input. Spread spectrum built in at
0~-0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency
selection through I2C interface. The device meets the Pentium power-up stabilization, which requires
CPU and PCI clocks be stable within 2 ms after power-up. Using dual function pin for the slots(ISA, PCI,
CPU, DIMM) is not recommend.
2.0 PRODUCT FEATURES
Supports AMD CPU with I2C.
3 CPU clocks (one free-running CPU clock)
13 SDRAM clocks for 3 DIMMs
6 PCI synchronous clocks
2 AGP clocks
2 REF clocks as 14.318MHz outputs
< 250ps skew among CPU and SDRAM clocks
< 250ps skew among PCI clocks
Skew from CPU(earlier) to PCI clock 1 to 4ns, center 2.6ns.
Smooth frequency switch with selections from 66 MHz to 200 MHz CPU
Stepless frequency programming by controlling the VCO freq. and the clock output divisor ratio
Programmable skew for CPU to SDRAM and CPU to AGP clock outputs
I2C 2-Wire serial interface and I2C read back
±0.25% or 0~-0.5% spread spectrum function to reduce EMI
Programmable registers to enable/stop each output and select modes
MODE pin for power Management and RESET# out when system hang
One 48 MHz for USB & one 24_48 MHz for super I/O
48-pin SSOP package
Publication Release Date: Oct. 2000
-1-
Revision 0.60

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