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CS48LV13-CNZR Просмотр технического описания (PDF) - Cirrus Logic

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CS48LV13-CNZR Datasheet PDF : 26 Pages
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4.5 Thermal Characteristics
4.5 Thermal Characteristics
Parameter
QFN junction-to-ambient thermal impedance1,2
WLCSP junction-to-ambient thermal impedance1,2
QFN junction-to-ambient thermal impedance1,3
WLCSP junction-to-ambient thermal impedance1,3
Symbol
Min
Typ
Max
Units
4-layer board
JA
28
°C/Watt
4-layer board
JA
47
°C/Watt
2-layer board
JA
85
°C/Watt
2-layer board
JA
89
°C/Watt
1. To calculate the die temperature for a given power dissipation:
Tj = Ambient temperature + [ (Power Dissipation in Watts) * ja ]
2.Four-layer board is specified as a 76 mm X 114 mm, 1.6 mm thick FR-4 material with 1-oz. copper covering 20% of the top and bottom layers and
0.5-oz. copper covering 90% of the internal power plane and ground plane layer
3.Two-layer board is specified as a 76 mm X 114 mm, 1.6 mm thick FR-4 material with 1-oz. copper covering 20% of the top and bottom layers.
4.6 Digital Interface Specifications and Characteristics
Test Conditions (unless otherwise specified): VL = 1.8 V–3.3 V, VD = 1.0 V–1.2 V; GND = 0 V; TA = +25°C.
Parameters
Test Conditions
Symbol
Input leakage current1
Internal weak pull-up2
Iin
Input capacitance 3
VL logic High-level output voltage4
Low-level output voltage4
High-level output voltage4
Low-level output voltage4
High-level input voltage
Low-level input voltage
VL = 3.3 V
VL = 3.3 V
VL = 1.8 V
VL = 1.8 V
IOH = 2 mA
IOL = 2 mA
IOH = 1 mA
IOL = 1 mA
VOH
VOL
VOH
VOL
VIH
VIL
1.Specification is per pin, and does not include current through pull-up.
2.The effective pull-up value decreases (more current is provided) with increased VL.
3.This value is by design and not a tested parameter.
4.This value tested with 2-mA drivers enabled on pins.
Min
Typ
Max
500
15
60
10
VL–0.4
0.20•VL
VL–0.4
0.20•VL
0.76•VL
0.30•VL
Units
nA
k
pF
V
V
V
V
V
V
Figure 4-1. Internal Weak Pull-up
15
DS1057F1

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