V62C2184096LL-85BI Просмотр технического описания (PDF) - Mosel Vitelic, Corp

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V62C2184096LL-85BI

512K X 8, CMOS STATIC RAM

Mosel Vitelic, Corp 

MOSEL VITELIC

V62C2184096

Data Retention Characteristics

Symbol

VDR

ICCDR

Parameter

VCC for Data Retention

CE1 ≥ VCC – 0.2V, CE2 < 0.2V, VIN ≥ VCC – 0.2V,

or VIN ≤ 0.2V

Data Retention Current

CE1 ≥ VDR – 0.2V, CE2 < 0.2V, VIN ≥ VCC – 0.2V,

or VIN ≤ 0.2V, VDR = 1.2V

Com’l

Ind.

tCDR

Chip Deselect to Data Retention Time

tR

Operation Recovery Time (see Retention Waveform)

NOTES:

1. tRC = Read Cycle Time

2. TA = +25°C.

Power

L

LL

L

LL

Min.

1.2

—

—

—

—

0

tRC(1)

Typ.(2)

—

1

0.5

—

—

—

—

Max.

3.0

3

2

5

4

—

—

Units

V

µA

ns

ns

Low VCC Data Retention Waveform (1) (CE1 Controlled)

Data Retention Mode

VCC

2.3V

VDR ≥ 1.2V

2.3V

tCDR

tR

CE1

2.0V

CE1 ≥ VCC – 0.2V

2.0V

V62C2184096 Rev. 1.5 June 2000

Key to Switching Waveforms

WAVEFORM

INPUTS

OUTPUTS

MUST BE

STEADY

WILL BE

STEADY

MAY CHANGE

FROM H TO L

WILL BE

CHANGING

FROM H TO L

MAY CHANGE

FROM L TO H

WILL BE

CHANGING

FROM L TO H

DON'T CARE:

ANY CHANGE

PERMITTED

DOES NOT

APPLY

CHANGING:

STATE

UNKNOWN

CENTER

LINE IS HIGH

IMPEDANCE

“OFF” STATE

5

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