CS5510-AS Просмотр технического описания (PDF) - Cirrus Logic

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CS5510-AS

16-bit and 20-bit, 8-pin ∆Σ ADC

Cirrus Logic 

CS5510/11/12/13

LIST OF FIGURES

Figure 1. SDO Read Timing CS5510/12 (Not to Scale).................................................................. 9

Figure 2. SDO Read Timing CS5511/13 (Not to Scale).................................................................. 9

Figure 3. Input models for AIN+ and AIN- pins. ............................................................................ 10

Figure 4. CS5512/13 Measured Noise-Free Bits vs. VREF. ......................................................... 11

Figure 5. Input model for VREF pin............................................................................................... 11

Figure 6. CS5510/11/12/13 Configured with a +5.0 V Analog Supply. ......................................... 12

Figure 7. CS5510/11/12/13 Configured with ±2.5 V Analog Supplies........................................... 12

Figure 8. CS5510/11/12/13 Configured with V+ = +3.3 V and V- = -1.7 V;

or V+ = +3.0 V and V- = -2.0 V. .................................................................................... 13

Figure 9. CS and SCLK Digital Input Levels. ................................................................................ 14

Figure 10. SDO Digital Output Levels. .......................................................................................... 14

Figure 11. Serial Port Output Drive Logic. .................................................................................... 14

Figure 12. External (CMOS Compatible) Clock Source. ............................................................... 15

Figure 13. Using a Microcontroller as a Clock Source. ................................................................. 15

Figure 14. Typical Linearity Error for CS5510............................................................................... 15

Figure 15. Typical Linearity Error for CS5512............................................................................... 15

Figure 16. Data Word Timing for the CS5510............................................................................... 16

Figure 17. Data Word Timing for the CS5511............................................................................... 17

Figure 18. Data Word Timing for the CS5512............................................................................... 17

Figure 19. Data Word Timing for the CS5513............................................................................... 17

Figure 20. Digital Filter Response................................................................................................. 19

LIST OF TABLES

Table 1. CS5512/13 Output Conversion Data Register Description (Flags + 20 bits). ................. 18

Table 2. CS5510/11 Output Conversion Data Register Description (Flags + 16 bits). ................. 18

Table 3. CS5510/11/12/13 Output Coding. ................................................................................... 18

Table 4. Digital Filter Response at 32.768 kHz............................................................................. 19

Table 5. Device Ordering Information ........................................................................................... 23

DS337F3

3

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