STLC2410B Просмотр технического описания (PDF) - STMicroelectronics
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STLC2410B Datasheet PDF : 20 Pages
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STLC2410B
Figure 1. Block Diagram and Electrical Schematic
JTAG
VDD
100nF
VDDIO
100nF
VDDIO
100nF
5
ARM7
TDMI
INTERRUPT
CONTROLLER
4
PCM
PCM
2
EXT._INT1/2
2
USB
USB
2
I2C
I2C
APB
BRIDGE
4
SPI
SPI
13
RF BUS
RADIO
I/F
BLUETOOTH®
CORE
D
M RAM
A
TIMER
START
DETECT
16
GPIO
GPIO(O..15)
8
UART
UART2
(*)
22pF
LPOCLKP
Y2
32KHz
22pF
LPOCLKN
VDDPLL
VDD
100nF
BOOT
UART
LPO
ROM
FIFO
SYSTEM
CONTROL
EMI
4
3
20
16
XIN
BOOT WAIT CSN(0..2) ADDR(0..19) DATA(0..15)
RD/WR
(*) If a low-power clock is available, it can be connected to the LPOCLKP pin in stead of using a crystal
2
UART
UART1
2 RESET
SYS_CLK_REQ
D02TL550
VDD
100nF
4/20
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