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7805ALPRPDS Datasheet PDF : 22 Pages
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16-Bit Latchup Protected Analog to Digital Converter 7809LP
TABLE 1. 7809LP PIN DESCRIPTION
PIN
SYMBOL
DESCRIPTION
21
BUSY Busy Output. Falls when a conversion is started, and remains LOW until the conversion is com-
pleted and the data is latched into the output shift register. CS or R/C must be HIGH when
BUSY rises, or another conversion will start without time for signal acquisition.
22
PWRD Power Down Input. If HIGH, conversions are inhibited and power consumption is significantly
reduced. Results from the previous conversions are maintained in the output shift register.
23
LPVANA Latchup Protection Analog Supply.
24
LPVDIG Latchup Protection Digital Supply.
TABLE 2. 7809LP ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
MIN
MAX
UNIT
Analog Inputs
Ground Voltage Differences: DGND, AGND2
VANA
VDIG
VDIG to VANA
Specified Performance
Digital Inputs
Storage Temperature
R1IN
-25
25
V
R2IN
-25
25
V
R3IN
-25
25
V
CAP
VANA + 0.3 AGND2 - 0.3
V
REF 1
-0.3
0.3
V
--
7
V
7
V
--
0.3
V
-40
85
°C
-0.3
VDIG + 0.3
V
TSTG
-65
150
°C
1. Indefinite short to AGND2, momentarily short to VANA.
TABLE 3. 7809LP DC ACCURACY SPECIFICATIONS
(SPECIFIED PERFORMANCE -40 TO +85°C)
PARAMETER
MIN
TYP
MAX
UNIT
Integral Linearity Error
-40 to 85°C
--
--
±3
LSB 1
--
--
±5
Differential Linearity Error
-40 to 85°C
--
--
-2, 3
LSB
--
--
-1, 6
LSB
No Missing Codes 2
15
--
--
Bits
Transition Noise 3
--
1.3
--
LSB
Full Scale Error 4,5
--
--
± 0.6
%
Full Scale Error 4,5 (using ext. 2.5000 Vref)
Full Scale Error Drift
--
± 0.6
%
--
±7
--
ppm/°C
01.11.05 Rev 7
All data sheets are subject to change without notice 3
©2005 Maxwell Technologies
All rights reserved.
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