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BH16273DGG

16-bit D-type flip-flop

Philips Electronics 

Philips Semiconductors

16-bit D-type flip-flop

Product specification

74ABT16273

74ABTH16273

DC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

Temp = +25°C

Temp = -40°C

to +85°C

MIN TYP MAX MIN MAX

VIK

VOH

VOL

VRST

Input clamp voltage

High-level output voltage

Low-level output voltage

Power-up output

voltage3

VCC = 4.5V; IIK = –18mA

VCC = 4.5V; IOH = –3mA; VI = VIL or VIH

VCC = 5.0V; IOH = –3mA; VI = VIL or VIH

VCC = 4.5V; IOH = –32mA; VIL or VIH

VCC = 4.5V; IOL = 64mA; VI = VIL or VIH

VCC = 5.5V; IO = 1mA; VI = GND or VCC

0.9 –1.2

–1.2

2.5 2.9

2.5

3.0 3.4

3.0

2.0 2.4

2.0

0.42 0.55

0.55

0.13 0.55

0.55

II

Input leakage current

74ABT16273

VCC = 5.5V; VI = VCC or GND

±0.1 ±1

±1

II

IHOLD

IOFF

IO

ICEX

Input leakage current

74ABTH16273

VCC = 5.5V; VI = VCC or GND

VCC = 5.5V; VI = VCC

VCC = 5.5V; VI = 0

Control

pins

Data pins

±0.01 ±1

0.01 1

–2 –3

Bus Hold current inputs4

74ABTH16273

VCC = 4.5V; VI = 0.8V

VCC = 4.5V; VI = 2.0V

VCC = 5.5V; VI = 0 to 5.5V

35

35

–75

–75

±800

Power-off leakage

current

VCC= 0.0V; VO or VI t 4.5V

±5.0 ±100

output current1

VCC = 5.5V; VO = 2.5V

–50 –70 –180 –50

Output High leakage

current

VCC = 5.5V; VO = 5.5V; VI = GND or VCC

5.0 50

±1

1

–5

±100

–180

50

ICCH

ICCL

∆ICC

Quiescent supply current

Additional supply current

per input pin2

74ABT16273

VCC = 5.5V; Outputs High, VI = GND or VCC

VCC = 5.5V; Outputs Low, VI = GND or VCC

VCC = 5.5V; One input at 3.4V.

Other inputs at VCC or GND

0.2 1

1

8

19

19

5 100

100

∆ICC

Additional supply current

per input pin2

74ABTH16273

VCC = 5.5V; One input at 3.4V.

Other inputs at VCC or GND

0.2 1

1

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.

4. This is the bus hold overdrive current required to force the input to the opposite logic state.

UNIT

V

V

V

µA

µA

µA

µA

µA

µA

mA

µA

mA

µA

mA

AC CHARACTERISTICS

GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω;

SYMBOL

PARAMETER

WAVEFORM

tPLH

Propagation delay

tPHL

nCP to nQx

1

tPHL

Propagation delay

nMR to nQx

2

fMAX

Maximum clock frequency

1

LIMITS

Tamb = +25°C

VCC = +5.0V

MIN

TYP

MAX

Tamb = –40 to +85 °C

VCC = +5.0V ±0.5V

MIN

MAX

1.5

2.5

3.4

1.5

4.0

1.2

2.0

2.7

1.2

3.0

1.9

3.7

4.3

1.9

5.3

150

240

150

UNIT

ns

ns

MHz

1998 Feb 27

5

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