MC74HC367A(2013) Просмотр технического описания (PDF) - ON Semiconductor
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MC74HC367A
(Rev.:2013)
(Rev.:2013)
ON Semiconductor
MC74HC367A Datasheet PDF : 7 Pages
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MC74HC367A
Hex 3-State Noninverting
Buffer with Separate 2-Bit
and 4-Bit Sections
High−Performance Silicon−Gate CMOS
The MC74HC367A is identical in pinout to the LS367. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device is arranged into 2−bit and 4−bit sections, each having its
own active−low Output Enable. When either of the enables is high, the
affected buffer outputs are placed into high−impedance states. The
HC367A has noninverting outputs.
Features
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• These are Pb−Free Devices
A0 2
A1 4
A2 6
A3 10
A4 12
A5 14
3 Y0
5 Y1
7 Y2
9 Y3
11 Y4
13 Y5
OUTPUT ENABLE 1 1
OUTPUT ENABLE 2 15
PIN 16 = VCC
PIN 8 = GND
Figure 1. Logic Diagram
http://onsemi.com
16
1
MARKING
16 DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
HC367AG
AWLYWW
1
16
TSSOP−16
HC
16
DT SUFFIX
367A
CASE 948F
ALYWG
G
1
1
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
OUTPUT
ENABLE 1
1
A0 2
Y0 3
16 VCC
15
OUTPUT
ENABLE 2
14 A5
A1 4
Y1 5
13 Y5
12 A4
A2 6
11 Y4
Y2 7
10 A3
GND 8
9 Y3
FUNCTION TABLE
Inputs
Enable 1,
Enable 2 A
Output
Y
L
L
L
L
H
H
H
X
Z
X = don’t care
Z = high impedance
© Semiconductor Components Industries, LLC, 2013
June, 2013 − Rev. 4
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
1
Publication Order Number:
MC74HC367A/D
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