MC74HC354 Просмотр технического описания (PDF) - Motorola => Freescale
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MC74HC354
Motorola => Freescale
MC74HC354 Datasheet PDF : 9 Pages
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MC54/74HC354
FUNCTION TABLE
Address Latch Contents #
Inputs
Outputs
Data–Latch
A2
A1
A0
Enable
OE1 OE2 OE3
Y
Y
Description
X
X
X
X
H
X
X
Z
Z
Outputs in High–Impedance States
X
X
X
X
X
H
X
Z
Z
X
X
X
X
X
X
L
Z
Z
L
L
L
L
L
L
H
D0
D0 Data–Latch is Transparent
L
L
H
D1
D1
L
H
L
D2
D2
L
H
H
D3
D3
H
L
L
D4
D4
H
L
H
D5
D5
H
H
L
D6
D6
H
H
H
D7
D7
L
L
L
H
L
L
H
D0n
D0n New Data is Stored in Data–Latch and is
L
L
H
D1n
D1n Not Alterable
L
H
L
D2n
D2n
L
H
H
D3n
D3n
H
L
L
D4n
D4n
H
L
H
D5n
D5n
H
H
L
D6n
D6n
H
H
H
D7n
D7n
# Represents bits in Address–Latch. See Address–Latch Enable pin description.
X = Don’t Care; Z = High Impedance; D0–D7 = the data at inputs D0 through D7; D0n–D7n = the data present at inputs D0 through D7 when the
Data–Latch Enable pin was taken high.
SWITCHING WAVEFORMS
tr
tf
Any Input
90%
10%
VALID
VALID
VCC
D0–D7
A0–A2
50%
VCC
GND
GND
tPLH
tPHL
90%
Y or Y
10%
Y or Y
50%
tTLH
tTHL
Figure 1.
Figure 2.
Address–
Latch Enable
Y or Y
50%
tPLH
50%
tw
tPHL
Figure 3.
OE1, OE2
OE3
VCC
GND
Y or Y
Y or Y
50%
tPZL
tPLZ
50%
tPZH tPHZ
50%
Figure 4.
VCC
GND
High
Impedance
10% VOL
90% VOH
High
Impedance
High–Speed CMOS Logic Data
5
DL129 — Rev 6
MOTOROLA
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