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ISDMICROTAD-16ME

Single-Chip Voice Record/Playback Device 16-Minute Duration

Information Storage Devices 

ISD MicroTAD-16M

DETAILED DESCRIPTION

SPEECH/SOUND QUALITY

The ISD MicroTAD-16M ChipCorder is offered at

4.0 KHz sampling frequency.

The speech samples are stored directly into on-

chip nonvolatile memory without the digitization

and compression associated with other solu-

tions. Direct analog storage provides a natural

sounding reproduction of voice, music, tones,

and sound effects not available with most solid-

state solutions.

FLASH STORAGE

One of the benefits of ISD’s ChipCorder technolo-

gy is the use of on-chip nonvolatile memory, which

provides zero-power message storage. The mes-

sage is retained for up to 100 years (typically)

without power. In addition, the device can be

re-recorded (typically) over 100,000 times.

MICROCONTROLLER INTERFACE

A four-wire (SCLK, MOSI, MISO, SS) SPI interface is

provided for ISD MicroTAD-16M control and ad-

dressing functions. The ISD MicroTAD-16M is con-

figured to operate as a peripheral slave device,

with a microcontroller-based SPI bus interface.

Read/Write access to all the internal registers oc-

curs through this SPI interface. An interrupt signal

(INT) and internal read-only Status Register are

provided for handshake purposes.

PROGRAMMING

The ISD MicroTAD-16M is also ideal for playback-

only applications, where single or multiple mes-

sage Playback is controlled through the SPI port.

Once the desired message configuration is creat-

ed, duplicates can easily be generated via an

ISD programmer or a 3rd party programmer.

PIN DESCRIPTIONS

VOLTAGE INPUTS (VCCA, VCCD)

To minimize noise, the analog and digital circuits

in the ISD MicroTAD-16M device use separate pow-

er busses. These +3 V busses are brought out to

separate pins and should be tied together as

close to the supply as possible. In addition, these

supplies should be decoupled as close to the

package as possible.

GROUND INPUTS (VSSA, VSSD)

The ISD MicroTAD-16M utilizes separate analog

and digital ground busses. The analog ground

(VSSA) pins should be tied together as close to

the package as possible and connected

through a low-impedance path to power supply

ground. The digital ground (VSSD) pin should be

connected through a separate low-impedance

path to power supply ground. These ground

paths should be large enough to ensure that the

impedance between the VSSA pins and the VSSD

pin is less than 3 Ω. The backside of the die is con-

nected to VSS through the substrate resistance.

In a chip-on-board design, the die attach area

must be connected to VSS or left floating.

ISD

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