MAX8739(2006) Просмотр технического описания (PDF) - Maxim Integrated
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MAX8739 Datasheet PDF : 19 Pages
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TFT, LCD, DC-DC Converter with
Operational Amplifiers
Pin Description
PIN
NAME
FUNCTION
1
COM Internal High-Voltage MOSFET Switch Common Terminal
2
SRC
Switch Input. Source of the internal high-voltage, p-channel MOSFET. Bypass SRC to PGND with a
minimum of 0.1µF close to the pins.
3
LDO
Internal 5V Linear Regulator Output. This regulator powers all internal circuitry except OUT1 and OUT2
operational amplifiers. Bypass LDO to AGND with a 0.22µF or greater ceramic capacitor.
Power Ground. PGND is the source of the step-up regulator’s n-channel power MOSFET. Connect PGND
4
PGND to the input capacitor ground terminals through a short, wide PC board trace. Connect PGND to analog
ground (AGND) underneath the IC.
5
AGND Analog Ground. Connect AGND to power ground (PGND) underneath the IC.
6
POS1 Operational Amplifier 1 Noninverting Input
7
NEG1 Operational Amplifier 1 Inverting Input
8
OUT1 Operational Amplifier 1 Output
9
OUT2 Operational Amplifier 2 Output
10
NEG2 Operational Amplifier 2 Inverting Input
11
POS2 Operational Amplifier 2 Noninverting Input
Operational-Amplifier Supply Input. SUP is the positive supply rail for the OUT1 and OUT2 amplifiers. SUP
12
SUP
is also the supply input of the internal 5V linear regulator. Connect SUP to the main step-up regulator
output and bypass SUP to AGND with a 0.1µF capacitor.
13
LX
n-Channel Power MOSFET Drain and Switching Node. Connect the inductor and the catch diode to LX
and minimize the trace area for lowest EMI.
14
IN
Supply Voltage. IN can range from 1.8V to 5.5V.
15
FREQ
Oscillator Frequency-Select Input. Pull FREQ low or leave it unconnected for 600kHz operation. Connect
FREQ to IN for 1.2MHz operation. This input has a 5µA pulldown.
16
FB
Step-Up Regulator Feedback Input. Regulates to 1.24V (nominal). Connect a resistive voltage-divider
from the output (VMAIN) to FB to analog ground (AGND). Place the divider within 5mm of FB.
17
COMP Step-Up Regulator Error-Amplifier Compensation Point. Connect a series resistor and capacitor from
COMP to AGND. See the Loop Compensation section for component selection guidelines.
High-Voltage Switch-Delay Input. Connect a capacitor from DEL to AGND to set the high-voltage switch
18
DEL
startup delay. A 5µA current source charges CDEL. The switches between SRC, COM, and DRN are
disabled during the delay period.
High-Voltage Switch-Control Input. When CTL is high, the high-voltage switch between COM and SRC is
19
CTL
on and the high-voltage switches between COM and DRN are off. When CTL is low, the high-voltage
switch between COM and SRC is off and the high-voltage switches between COM and DRN are on. CTL
is inhibited by the undervoltage lockout and when VDEL is less than 1.24V.
20
DRN
Switch Input. Drain of the internal, high-voltage, back-to-back p-channel MOSFETs connected to COM.
—
EP
Exposed Pad
10 ______________________________________________________________________________________
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