MAX8737 Просмотр технического описания (PDF) - Maxim Integrated

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MAX8737

Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs

Maxim Integrated 

Dual, Low-Voltage Linear Regulator Controllers

with External MOSFETs

5V BIAS

SUPPLY

C1

1.0µF

POWER

GOOD 1

R6A

100kΩ

INPUT

1.8V TO 2.5V

CSYS1*

100µF

1.5V

2A (MAX)

COUT1

10µF

CIN1

10µF

RCS1

20mΩ R4A

10Ω

N1

R3A

27Ω

C2A

0.1µF

R5A

340Ω

ON

OFF

SYSTEM REF (2.0V)

R1A

33.2kΩ

R2A

100kΩ

VCC

PGOOD1

PGOOD2

MAX8737

DRV1

DRV2

CS1

CS2

OUT1

EN1

OUT2

EN2

REFIN1

REFIN2

GND

N1/N2: Si 4922DY

R6B

100kΩ

POWER

GOOD 2

N2

R3B

33Ω

C2B

0.22µF

CIN2

10µF

RCS2

R4B 20mΩ

10Ω

INPUT

1.25V TO 1.5V

CSYS2*

100µF

1.05V

3A (MAX)

COUT2

22µF

R5B

150Ω

R1B

90kΩ

R2B

100kΩ

ON

OFF

SYSTEM REF (2.0V)

* A LOCAL 10µF CERAMIC CAPACITOR WILL BE SUFFICIENT

FOR MOST APPLICATIONS. IF THE MAX8737 IS POWERED

FROM A HIGH-IMPEDANCE SOURCE, ADDITIONAL LOW-ESR

POLYMER CAPACITORS ARE RECOMMENDED ON THE INPUT.

Figure 1. Typical Operating Circuit with Current Limit

NOTE: THE SYSTEM REFERENCE IS TYPICALLY

GENERATED BY THE STEP-DOWN CONVERTER

USED TO POWER THE DUAL LOW-VOLTAGE

LINEAR REGULATORS.

resistor network is calculated using the short-circuit

current (ISHORT), the maximum load current (IMAX), cur-

rent-sense resistor (RCS), the 10mV (±3mV) current-

limit threshold (VILIM), and the external reference input

(REFIN_). See Figure 3:

1) Pick the RCS requirement for maximum short-cir-

cuit current:

RCS = VILIM /ISHORT

2) Select R1 = 10Ω and select R2 using the follow-

ing formula:

R2 = (VREFIN + VILIM )R1

IMAXRCS − VILIM

UVP Short-Circuit Protection

There are two levels of short-circuit UVP available in the

controller. When the current-limit protection is not used

(CS_= VCC), the output undervoltage timeout protection

is enabled, which protects the regulator against short

circuits. Output UVP timing depends on the magnitude

of the output voltage drop. To clear the UVP fault latch,

toggle the respective EN_ input, or cycle VCC below its

UVLO threshold.

_______________________________________________________________________________________ 9

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