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ISP1161 Просмотр технического описания (PDF) - Philips Electronics

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ISP1161 Datasheet PDF : 127 Pages
First Prev 121 122 123 124 125 126 127
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . 1 12.4
End-Of-Transfer conditions. . . . . . . . . . . . . . . 51
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 13
HC registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 13.1
HC control and status registers. . . . . . . . . . . . 54
4
Ordering information . . . . . . . . . . . . . . . . . . . . . 4 13.2
HC frame counter registers. . . . . . . . . . . . . . . 62
5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5 13.3
HC Root Hub registers . . . . . . . . . . . . . . . . . . 66
13.4
HC DMA and interrupt control registers . . . . . 76
6
Pinning information . . . . . . . . . . . . . . . . . . . . . . 7 13.5
HC miscellaneous registers . . . . . . . . . . . . . . 81
6.1
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13.6
HC buffer RAM control registers . . . . . . . . . . . 82
6.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7 14
DC commands and registers . . . . . . . . . . . . . 86
7
Functional description . . . . . . . . . . . . . . . . . . 11 14.1
Initialization commands. . . . . . . . . . . . . . . . . . 89
7.1
PLL clock multiplier. . . . . . . . . . . . . . . . . . . . . 11 14.2
Data flow commands . . . . . . . . . . . . . . . . . . . 96
7.2
Bit clock recovery . . . . . . . . . . . . . . . . . . . . . . 11 14.3
General commands. . . . . . . . . . . . . . . . . . . . 100
7.3
7.4
Analog transceivers . . . . . . . . . . . . . . . . . . . . 11
Philips Serial Interface Engine (SIE). . . . . . . . 11
15
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
7.5
SoftConnect (in DC) . . . . . . . . . . . . . . . . . . . . 11 16
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . 105
7.6
GoodLink (in DC) . . . . . . . . . . . . . . . . . . . . . . 12 17
External clock input . . . . . . . . . . . . . . . . . . . . 106
7.7
Suspend and wakeup (in DC). . . . . . . . . . . . . 12 18
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 107
8
Microprocessor bus interface. . . . . . . . . . . . . 12 19
Static characteristics . . . . . . . . . . . . . . . . . . . 108
8.1
I/O addressing mode . . . . . . . . . . . . . . . . . . . 12 20
Dynamic characteristics . . . . . . . . . . . . . . . . 111
8.2
DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 20.1
Timing symbols . . . . . . . . . . . . . . . . . . . . . . . 112
8.3
Microprocessor read/write ISP1161’s
20.2
Parallel I/O timing . . . . . . . . . . . . . . . . . . . . . 113
internal control registers by PIO mode . . . . . 14 20.3
DMA interface timing. . . . . . . . . . . . . . . . . . . 114
8.4
Microprocessor read/write ISP1161’s
21
Application information. . . . . . . . . . . . . . . . . 119
internal FIFO buffer RAM by PIO mode. . . . . 17 21.1
Typical interface circuit . . . . . . . . . . . . . . . . . 119
8.5
Microprocessor read/write ISP1161’s
internal FIFO buffer RAM by DMA mode. . . . 17
21.2
Interfacing a ISP1161 with a SH7709
RISC processor . . . . . . . . . . . . . . . . . . . . . . 120
8.6
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 21.3
Typical software model . . . . . . . . . . . . . . . . . 120
9
The USB host controller (HC) . . . . . . . . . . . . . 22 22
9.1
9.2
The HC’s four USB states. . . . . . . . . . . . . . . . 22
Generating USB traffic . . . . . . . . . . . . . . . . . . 22
23
Test information . . . . . . . . . . . . . . . . . . . . . . . 121
Package outline . . . . . . . . . . . . . . . . . . . . . . . 123
9.3
PTD data structure . . . . . . . . . . . . . . . . . . . . . 24 24
Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
9.4
HC’s internal FIFO buffer RAM structure . . . . 27 24.1
Introduction to soldering surface mount
9.5
HC’s operational model . . . . . . . . . . . . . . . . . 33
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
9.6
Microprocessor loading. . . . . . . . . . . . . . . . . . 36 24.2
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 125
9.7
Internal 15 kW pull-down resistors for
24.3
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 125
downstream ports . . . . . . . . . . . . . . . . . . . . . 36 24.4
Manual soldering. . . . . . . . . . . . . . . . . . . . . . 126
9.8
Overcurrent detection and power switching
24.5
Package related soldering information . . . . . 126
control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 25
Revision history . . . . . . . . . . . . . . . . . . . . . . . 126
10
Suspend and wakeup (in HC) . . . . . . . . . . . . . 40 26
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 127
10.1
HC suspended state . . . . . . . . . . . . . . . . . . . . 40 27
10.2
HC wakeup from suspended state . . . . . . . . . 41 28
11
The USB device controller (DC) . . . . . . . . . . . 42 29
11.1
DC data transfer operation . . . . . . . . . . . . . . . 42
11.2
Device DMA transfer. . . . . . . . . . . . . . . . . . . . 43
11.3
Endpoint descriptions . . . . . . . . . . . . . . . . . . . 44
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 127
12
DMA transfer for the Device Controller . . . . . 48
12.1
Selecting an endpoint for DMA transfer . . . . . 48
12.2
8237 compatible mode . . . . . . . . . . . . . . . . . . 49
12.3
DACK-only mode . . . . . . . . . . . . . . . . . . . . . . 50
© Philips Electronics N.V. 2001.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 3 July 2001
Document order number: 9397 750 08313

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