IDT6168LA15(2001) Просмотр технического описания (PDF) - Integrated Device Technology
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IDT6168LA15 Datasheet PDF : 9 Pages
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IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
AC Electrical Characteristics (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA15(1)
6168SA20(1)
6168LA20(1)
6168SA25
6168LA25
6168SA45(2)
6168LA45(2)
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tRC
Read Cycle Time
15
____
20
____
25
____
45
____
ns
tAA
Address Access Time
____
15
____
20
____
25
____
45
ns
tACS
Chip Select Access Time
____
15
____
20
____
25
____
45
ns
tCLZ(3)
Chip Select to Output in Low-Z
3
____
5
____
5
____
5
____
ns
tCHZ(3)
Chip Desele ct to Output in High-Z
____
8
____
10
____
10
____
25
ns
tOH
Output Hold from Address Change
3
____
3
____
3
____
3
____
ns
tPU(3)
Chip Sele ct to Power Up Time
0
____
0
____
0
____
0
____
ns
tPD(3)
Chip Deselect to Power Down Time
____
35
____
20
____
25
____
40
ns
NOTES:
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. This parameter is guaranteed with AC Test load (Figure 2) by device characterization, but is not production tested.
3090 tbl 12
Timing Waveform of Read Cycle No. 1(1, 2)
tRC
ADDRESS
DATAOUT
tAA
tOH
PREVIOUS DATA VALID
Timing Waveform of Read Cycle No. 2(1, 3)
tRC
CS
DATAOUT
VCC
ICC
SUPPLY
CURRENT
ISB
tACS
tCLZ (4)
HIGH IMPEDANCE
tPU
NOTES:
1. WE is HIGH for Read cycle.
2. CS is LOW for Read cycle.
3. Device is continuously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. Transition is measured ±200mV from steady state.
6.452
DATA VALID
, 3090 drw 06
tCHZ (3)
DATAOUT VALID
tPD
HIGH IMPEDANCE
,
3090 drw 07
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