IC61LV256 Просмотр технического описания (PDF) - Integrated Circuit Solution Inc

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IC61LV256

32K x 8 Hight Speed SRAM with 3.3V

Integrated Circuit Solution Inc 

IC61LV256

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol

tRC

tAA

tOHA

tACE

tDOE

tLZOE(2)

tHZOE(2)

tLZCE(2)

tHZCE(2)

tPU(3)

tPD(4)

Parameter

Read Cycle Time

Address Access Time

Output Hold Time

CE Access Time

OE Access Time

OE to Low-Z Output

OE to High-Z Output

CE to Low-Z Output

CE to High-Z Output

CE to Power-Up

CE to Power-Down

-8 ns

-10 ns

-12 ns

-15 ns

Min. Max. Min. Max. Min. Max. Min. Max. Unit

8 — 10 — 12 — 15 — ns

— 8 — 10 — 12 — 15 ns

2 — 2 — 2 — 2 — ns

— 8 — 10 — 12 — 15 ns

— 4 — 5 — 6 — 7 ns

0 — 0 — 0 — 0 — ns

— 4 — 5 — 5 — 6 ns

3 — 3 — 3 — 3 — ns

— 4 — 5 — 6 — 7 ns

0 — 0 — 0 — 0 — ns

— 8 — 10 — 12 — 15 ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse

levels of 0 to 3.0V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100%

tested.

3. Not 100% tested.

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Levels

Output Load

Unit

0V to 3.0V

3 ns

1.5V

See Figures 1 and 2

AC TEST LOADS

3.3V

319 Ω

3.3V

319 Ω

OUTPUT

30 pF

Including

jig and

scope

353 Ω

OUTPUT

5 pF

Including

jig and

scope

353 Ω

Figure 1.

Figure 2.

Integrated Circuit Solution Inc.

5

AHSR027-0B 11/28/2003

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