CY7C1049BV33 Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C1049BV33

512K x 8 Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

Write Cycle No. 1(WE Controlled, OE HIGH During Write)[15, 16]

tWC

ADDRESS

tSCE

CE

tAW

tSA

tPWE

WE

OE

DATA I/O

NOTE 17

tHZOE

Write Cycle No. 2 (WE Controlled, OE LOW)[16]

ADDRESS

CE

tSD

DATAIN VALID

tWC

tSCE

CY7C1049BV33

tHA

tHD

tSA

WE

DATA I/O

NOTE 17

tHZWE

tAW

tPWE

tSD

DATA VALID

tHA

tHD

tLZWE

Truth Table

CE

OE WE

I/O0 – I/O7

H

X

X High Z

Power-Down

Mode

L

L

H Data Out

Read

L

X

L Data In

Write

L

H

H High Z

Selected, Outputs Disabled

Notes:

15. Data I/O is high-impedance if OE = VIH.

16. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.

17. During this period the I/Os are in the output state and input signals should not be applied.

Document #: 38-05139 Rev. *A

Power

Standby (ISB)

Active (ICC)

Active (ICC)

Active (ICC)

Page 7 of 10

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