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CY2309(2002) Просмотр технического описания (PDF) - Cypress Semiconductor

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CY2309
(Rev.:2002)
Cypress
Cypress Semiconductor Cypress
CY2309 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CY2305
CY2309
Switching Characteristics for CY2305SI-1and CY2309SI-1 Industrial Temperature Devices[7]
Parameter
t5
t6A
Name
Output to Output Skew[6]
Delay, REF Rising Edge to
CLKOUT Rising Edge[6]
t6B
Delay, REF Rising Edge to
CLKOUT Rising Edge[6]
t7
tJ
tLOCK
Device to Device Skew[6]
Cycle to Cycle Jitter[6]
PLL Lock Time[6]
Test Conditions
All outputs equally loaded
Measured at VDD/2
Measured at VDD/2. Measured in
PLL Bypass Mode, CY2309 device
only.
Measured at VDD/2 on the CLKOUT
pins of devices
Measured at 66.67 MHz, loaded
outputs
Stable power supply, valid clock
presented on REF pin
Min.
1
Typ.
0
5
0
Max.
250
±350
8.7
700
200
1.0
Unit
ps
ps
ns
ps
ps
ms
Switching Characteristics for CY2305SI-1H and CY2309SI-1H Industrial Temperature Devices[7]
Parameter
Name
t1
Output Frequency
Duty Cycle[6] = t2 ÷ t1
Duty Cycle[6] = t2 ÷ t1
t3
Rise Time[6]
t4
Fall Time[6]
t5
Output to Output Skew[6]
t6A
Delay, REF Rising Edge to
CLKOUT Rising Edge[6]
t6B
Delay, REF Rising Edge to
CLKOUT Rising Edge[6]
t7
t8
tJ
tLOCK
Device to Device Skew[6]
Output Slew Rate[6]
Cycle to Cycle Jitter[6]
PLL Lock Time[6]
Description
30-pF load
10-pF load
Measured at 1.4V, Fout = 66.67 MHz
Measured at 1.4V, Fout < 50.0 MHz
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
All outputs equally loaded
Measured at VDD/2
Measured at VDD/2. Measured in
PLL Bypass Mode, CY2309 device
only.
Measured at VDD/2 on the CLKOUT
pins of devices
Measured between 0.8V and 2.0V
using Test Circuit #2
Measured at 66.67 MHz, loaded
outputs
Stable power supply, valid clock
presented on REF pin
Min.
10
10
40.0
45.0
1
1
Typ.
Max.
Unit
100
133.33
MHz
MHz
50.0
60.0
%
50.0
55.0
%
1.50
ns
1.50
ns
250
ps
0
±350
ps
5
8.7
ns
0
700
ps
V/ns
200
ps
1.0
ms
Switching Waveforms
Duty Cycle Timing
1.4V
t1
t2
1.4V
1.4V
Document #: 38-07140 Rev. *C
Page 6 of 13

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