datasheetbank_Logo
Технический паспорт Поисковая и бесплатно техническое описание Скачать

CD4503 Просмотр технического описания (PDF) - Fairchild Semiconductor

Номер в каталоге
Компоненты Описание
Список матч
CD4503
Fairchild
Fairchild Semiconductor Fairchild
CD4503 Datasheet PDF : 6 Pages
1 2 3 4 5 6
October 1987
Revised January 1999
CD4503BC
Hex Non-Inverting 3-STATE Buffer
General Description
The CD4503BC is a hex non-inverting 3-STATE buffer with
high output current sink and source capability. 3-STATE
outputs make it useful in bus-oriented applications. Two
separate disable inputs are provided. Buffers 1 through 4
are controlled by the disable 4 input. Buffers 5 and 6 are
controlled by the disable 2 input. A high level on either dis-
able input will cause those gates on its control line to go
into a high impedance state.
Features
s Wide supply voltage range: 3.0 VDC to 18 VDC
s 3-STATE outputs
s Symmetrical turn on/turn off delays
s Symmetrical output rise and fall times
s Pin-for-pin replacement for MM80C97 and MC14503
Ordering Code:
Order Number
CD4503BCM
CD4503BCSJ
CD4503BCN
Package Number
Package Description
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Schematic Diagram
Pin Assignments for DIP, SOIC and SOP
Top View
Truth Table
In
0
1
X
X = Don't Care
Disable
Input
0
0
1
Out
0
1
3-STATE
© 1999 Fairchild Semiconductor Corporation DS005989.prf
www.fairchildsemi.com

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]