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ASC7511M8

LOW-VOLTAGE 2-WIRE DIGITAL TEMPERATURE SENSOR WITH THERMAL ALARM

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aSC7511

next one-shot reading or full activation. Standby mode is

discussed further in the Operation section.

THERM Limit Registers

There are two limit registers for the THERM function:

• THERM Remote High Limit

• THERM Local High Limit

These registers may be written or read-back at any time at

the addresses in shown in Table 2. Both limits has a default

value at power-up of 85°C.

The THERM alarm will be set when this limit is exceeded

and will reset when the temperature falls below that limit.

However, there is also a THERM hysteresis register that

may be used to set the temperature difference below

the THERM limit setting where the THERM alarm will be

reset once it has been triggered. This value is defaulted to

10°C and may be set to any value after power-on.

Operation of these registers in thermal management

applications is described in the Applications Section.

Table 7. Offset Register Sample Codes

Consecutive ALERT Register

This register will set the number of out of limit value

readings it will require before ALERT is asserted. It is

stored at register address 22h. The default value is for a

single out of limit reading to assert ALERT . The register

values for up to 4 out-of-limit readings are found in Table 8.

Number of Out-of-Limit

Measurements Required

Register Value

1

2

3

4

x = Don’t Care

y = SMBus Timeout Enable

yxxx 000x

yxxx 001x

yxxx 011x

yxxx 111x

Table 8. Consecutive Alert Register

This register is also used to control activation of the SMBus

timeout feature. It is disabled by default and enabled by

writing a 1 to the MSB, bit 7.

Remote Sensor Offset Register

Manufacturer’s Registers

Offset errors may be encountered on the remote sensor

readings caused by factors such as system clock noise

induced into the sensor interconnect or by a difference

between the measured temperature and the actual

temperature of interest in the system. A correction offset

value may be provided by the user to add or subtract from

the measured value resulting in a corrected value being

stored in the remote temperature registers. The limit values

will then be compared to these corrected values.

The offset register coding is two’s complement and it is

allocated two bytes at addresses 11h and 12h. Table 7

describes some examples of values in the range from -

128°C to +127.75°C that may be applied.

Offset Value

+127.75°C

+4°C

+1°C

+0.5°C

0°C

-0.5°C

-1°C

-4°C

-128°C

Offset Register

High Byte (11h)

0111 1111

0000 0100

0000 0001

0000 0000

0000 0000

1111 1111

1111 1111

1111 1100

1000 0000

Offset Register

Low Byte (11h)

11 00 0000

00 00 0000

00 00 0000

10 00 0000

00 00 0000

10 00 0000

00 00 0000

00 00 0000

00 00 0000

Manufacturer’s identification is stored in the register at

address FEh and set to the value 61h. Register FFh

contains the die revision code.

Serial Data Bus Operation

General Operation

Writing to and reading from the aSC7511 registers is

accomplished via the SMBus-compatible two-wire serial

interface. SMBus protocol requires that one device on the

bus initiate and control all read and write operations. This

device is called the “master” device. The master device

also generates the SCL signal that is the clock signal for all

other devices on the bus. All other devices on the bus are

called “slave” devices. The aSC7511 is a slave device.

Both the master and slave devices can send and receive

data on the bus.

During SMBus operations, one data bit is transmitted per

clock cycle. All SMBus operations follow a repeating nine

clock-cycle pattern that consists of eight bits (one byte) of

transmitted data followed by an acknowledge (ACK) or not

acknowledge (NACK) from the receiving device. Note that

there are no unused clock cycles during any operation—

therefore there must be no breaks in the stream of data

and ACKs / NACKs during data transfers.

For most operations, SMBus protocol requires the SDA line

to remain stable (unmoving) whenever SCL is high — i.e.

© Andigilog, Inc. 2006

-9-

www.andigilog.com

August 2006 - 70A04010

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