FDC37C669TQFP Просмотр технического описания (PDF) - SMSC -> Microchip

Номер в каталоге

Компоненты Описание

Список матч

FDC37C669TQFP

PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support

SMSC -> Microchip 

FUNCTIONAL DESCRIPTION

SUPER I/O REGISTERS

HOST PROCESSOR INTERFACE

The address map, shown below in Table 1, shows the

addresses of the different blocks of the Super I/O

immediately after power up. The base addresses of the

FDC, IDE, serial and parallel ports can be moved via the

configuration registers. Some addresses are used to

access more than one register.

The host processor communicates with the FDC37C669

through a series of read/write registers. The port

addresses for these registers are shown in Table 1.

Register access is accomplished through programmed

I/O or DMA transfers. All registers are 8 bits wide except

the IDE data register at port 1F0H which is 16 bits wide.

All host interface output buffers are capable of sinking a

minimum of 12 mA.

Table 1 - FDC37C669 Block Addresses

ADDRESS

BLOCK NAME

NOTES

3F0, 3F1 or 370, 371

Configuration

Write only; Note 1, 2

Base +0,1

Floppy Disk

Read only; Disabled at power

up; Note 2

Base +[2:5, 7]

Floppy Disk

Disabled at power up; Note 2

Base +[0:7]

Serial Port Com 1 Disabled at power up; Note 2

Base +[0:7]

Serial Port Com 2 Disabled at power up; Note 2

Base +[0:3] all modes

Parallel Port

Disabled at power up; Note 2

Base +[4:7] for EPP

Base +[400:403] for ECP

Base1 +[0:7]

IDE

Disabled at power up; Note 2

Base2 +[6]

Note 1: Configuration registers can only be modified in configuration mode, refer to the configuration register description

for more information. Access to status registers A and B of the floppy disk is disabled in configuration mode.

Note 2:The base addresses must be set in the configuration registers before accessing the logical devices.

17

Share Link: