W5100 Просмотр технического описания (PDF) - Unspecified

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W5100

single-chip Internet-enabled 10/100 Ethernet controller

Unspecified 

3. W5100 Registers

3.1 common registers

Address

0x0000

0x0001

0x0002

0x0003

0x0004

0x0005

0x0006

0x0007

0x0008

0x0009

0x000A

0x000B

0x000C

0x000D

0x000E

0x000F

0x0010

0x0011

0x0012

0x0013

0x0014

0x0015

0x0016

0x0017

0x0018

0x0019

Register

Mode (MR)

Gateway Address

(GAR0)

(GAR1)

(GAR2)

(GAR3)

Subnet mask Address

(SUBR0)

(SUBR1)

(SUBR2)

(SUBR3)

Source Hardware Address

(SHAR0)

(SHAR1)

(SHAR2)

(SHAR3)

(SHAR4)

(SHAR5)

Source IP Address

(SIPR0)

(SIPR1)

(SIPR2)

(SIPR3)

Reserved

Interrupt (IR)

Interrupt Mask (IMR)

Retry Time

(RTR0)

(RTR1)

Retry Count (RCR)

Address

0x001A

0x001B

0x001C

0x001D

0x001E

~

0x0027

0x0028

0x0029

0x002A

0x002B

0x002C

0x002D

0x002E

0x002F

0x0030

~

0x03FF

Register

RX Memory Size (RMSR)

TX Memory Size (TMSR)

Authentication Type in PPPoE

(PATR0)

(PATR1)

Reserved

PPP LCP Request Timer

(PTIMER)

PPP LCP Magic number

(PMAGIC)

Unreachable IP Address

(UIPR0)

(UIPR1)

(UIPR2)

(UIPR3)

Unreachable Port

(UPORT0)

(UPORT1)

Reserved

© Copyright 2008-2009 WIZnet Co., Inc. All rights reserved.

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