CS5344 Просмотр технического описания (PDF) - Cirrus Logic

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CS5344

98 dB, 96 kHz, Multi-Bit Audio A/D Converter

Cirrus Logic 

4. APPLICATIONS

CS5343/4

4.1 Operation as Clock Master or Slave

The CS5343/4 supports operation as either a clock master or slave. As a clock master, the left/right and

serial clocks are synchronously generated on-chip and output on the LRCK and SCLK pins, respectively.

As a clock slave, the LRCK and SCLK pins are always inputs and require external generation of the left/right

and serial clocks. The selection of clock master or slave is made via a 10 kΩ pull-up resistor from SDOUT

to VA for Master Mode selection or via a 10 kΩ pull-down resistor from SDOUT to GND for Slave Mode se-

lection, as shown in Table 1.

Mode

Master Mode

Slave Mode

Selection

10 kΩ pull-up resistor from SDOUT to VA

10 kΩ pull-down resistor from SDOUT to GND

Table 1. Master/Slave Mode Selection

4.1.1

Slave Mode Operation

A unique feature of the CS5343/4 is the automatic selection of either Single- or Double-Speed Mode when

acting as a clock slave. The auto-mode selection feature supports all standard audio sample rates from

4 to 108 kHz. Please refer to Table 2 for supported sample rate ranges in Slave Mode.

Speed Mode

Single-Speed Mode

Double-Speed Mode

MCLK/LRCK

Ratio

256x

512x

384x

768x

128x

256x

192x

384x

SCLK/LRCK

Ratio

64

64

48, 64

48, 64

64

64

48, 64

48, 64

Input Sample Rate Range (kHz)

4 - 54

4 - 54

4 - 54

4 - 54

86 - 108

86 - 108

86 - 108

86 - 108

Table 2. Speed Modes and the Associated Sample Rates (Fs) in Slave Mode

DS687A4

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